CMOS RAM. HM1-6508883 Datasheet

HM1-6508883 RAM. Datasheet pdf. Equivalent


Intersil Corporation HM1-6508883
HM-6508/883
March 1997
1024 x 1 CMOS RAM
Features
Description
• This Circuit is Processed in Accordance to
MIL-STD-883 and is Fully Conformant Under the Provi-
sions of Paragraph 1.2.1.
• Low Power Standby . . . . . . . . . . . . . . . . . . . . 50µW Max
• Low Power Operation . . . . . . . . . . . . . 20mW/MHz Max
• Fast Access Time. . . . . . . . . . . . . . . . . . . . . . 180ns Max
• Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . .2.0V Min
• TTL Compatible Input/Output
• High Output Drive - 2 TTL Loads
• On-Chip Address Register
The HM-6508/883 is a 1024 x 1 static CMOS RAM
fabricated using self-aligned silicon gate technology.
Synchronous circuit design techniques are employed to
achieve high performance and low power operation.
On chip latches are provided for address allowing efficient
interfacing with microprocessor systems. The data output
buffers can be forced to a high impedance state for use in
expanded memory arrays.
The HM-6508/883 is a fully static RAM and may be main-
tained in any state for an indefinite period of time. Data
retention supply voltage and supply current are guaranteed
over temperature.
Ordering Information
PACKAGE TEMP. RANGE 180ns 250ns
CERDIP -55oC to +125oC HM1-
HM1-
6508B/883 6508/883
PKG. NO.
F16.3
Pinout
HM1-6508/883
(CERDIP)
TOP VIEW
E1
A0 2
A1 3
A2 4
A3 5
A4 6
Q7
GND 8
16 VCC
15 D
14 W
13 A9
12 A8
11 A7
10 A6
9 A5
PIN DESCRIPTION
A Address Input
E Chip Enable
W Write Enable
D Data Input
Q Data Output
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-69
File Number 2985.1


HM1-6508883 Datasheet
Recommendation HM1-6508883 Datasheet
Part HM1-6508883
Description 1024 x 1 CMOS RAM
Feature HM1-6508883; HM-6508/883 March 1997 1024 x 1 CMOS RAM Description The HM-6508/883 is a 1024 x 1 static CMOS RAM .
Manufacture Intersil Corporation
Datasheet
Download HM1-6508883 Datasheet




Intersil Corporation HM1-6508883
HM-6508/883
Functional Diagram
A5 A
A6 LATCHED 5 GATED
A7
A8
ADDRESS
REGISTER
A
ROW
DECODER
32
A9
5
32 x 32
MATRIX
32
D
GATED COLUMN
A
DECODER
AND DATA I/O
Q
A
W 55
AA
LATCHED ADDRESS
E REGISTER
A0 A1 A2 A3 A4
NOTES:
1. All lines positive logic - active high.
2. Three-state buffers: A high output active.
3. Address latches and gated decoders: Latch on falling edge of E and gate on falling edge of E.
6-70



Intersil Corporation HM1-6508883
HM-6508/883
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
Typical Derating Factor . . . . . . . . . . .1.5mA/MHz Increase in ICCOP
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +0.8V
Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . .VCC -2.0V to VCC
Input Rise and Fall Time. . . . . . . . . . . . . . . . . . . . . . . . . . 40ns Max.
Thermal Resistance (Typical, Note 1)
θJA
CERDIP Package . . . . . . . . . . . . . . . . 75oC/W
θJC
15oC/W
Maximum Storage Temperature Range . . . . . . . . .-65oC to +150oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +175oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1925 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
TABLE 1. HM-6508/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER
SYMBOL
(NOTE 1)
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
MIN MAX UNITS
Output Low Voltage
VOL
VCC = 4.5V,
IOL = 3.2mA
1, 2, 3
-55oC TA +125oC
-
0.4
V
Output High Voltage
VOH
VCC = 4.5V,
IOH = -0.4mA
1, 2, 3
-55oC TA +125oC 2.4
-
V
Input Leakage Current
II VCC = 5.5V,
1, 2, 3
-55oC TA +125oC -1.0 +1.0
µA
VI = GND or VCC
Output Leakage Current
IOZ VCC = 5.5V,
VO = GND or VCC
1, 2, 3
-55oC TA +125oC -1.0 +1.0
µA
Data Retention Supply Current
HM-6508B/883
HM-6508/883
ICCDR
VCC = 2.0V,
E = VCC,
IO = 0mA,
VI = VCC or GND
1, 2, 3
-55oC TA +125oC
- 5 µA
- 10 µA
Operating Supply Current
ICCOP
VCC = 5.5V,
(Note 2),
E = 1MHz,
IO = 0mA,
1, 2, 3
-55oC TA +125oC
-
4
mA
Standby Supply Current
ICCSB
VCC = 5.0V,
IO = 0mA,
VI = VCC or GND
1, 2, 3
-55oC TA +125oC
-
10
µA
NOTES:
1. All voltages referenced to device GND.
2. Typical derating 1.5mA/MHz increase in ICCOP.
6-71





@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)