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Static RAM. HM1-65162-9 Datasheet |
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HM-65162
March 1997
2K x 8 Asynchronous
CMOS Static RAM
Features
• Fast Access Time. . . . . . . . . . . . . . . . . . . . 70/90ns Max
• Low Standby Current. . . . . . . . . . . . . . . . . . . .50µA Max
• Low Operating Current . . . . . . . . . . . . . . . . . 70mA Max
• Data Retention at 2.0V . . . . . . . . . . . . . . . . . . .20µA Max
• TTL Compatible Inputs and Outputs
• JEDEC Approved Pinout (2716, 6116 Type)
• No Clocks or Strobes Required
• Equal Cycle and Access Time
• Single 5V Supply
• Gated Inputs
• No Pull-Up or Pull-Down Resistors Required
Description
The HM-65162 is a CMOS 2048 x 8 Static Random Access
Memory manufactured using the Intersil Advanced SAJI V
process. The device utilizes asynchronous circuit design for
fast cycle time and ease of use. The pinout is the JEDEC 24
pin DIP, and 32 pad 8-bit wide standard which allows easy
memory board layouts flexible to accommodate a variety of
industry standard PROMs, RAMs, ROMs and EPROMs. The
HM-65162 is ideally suited for use in microprocessor based
systems with its 8-bit word length organization. The conve-
nient output enable also simplifies the bus interface by allow-
ing the data outputs to be controlled independent of the chip
enable. Gated inputs lower operating current and also elimi-
nate the need for pull-up or pull-down resistors.
Ordering Information
PACKAGE
CERDIP
JAN#
SMD#
CLCC
SMD#
TEMP. RANGE
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
-40oC to +85oC
-55oC to 125oC
70ns/20µA (NOTE 1)
HM1-65162B-9
29110BJA
8403606JA
HM4-65162B-9
8403606ZA
NOTE:
1. Access time/data retention supply current.
90ns/40µA (NOTE 1)
HM1-65162-9
29104BJA
8403602JA
HM4-65162-9
8403602ZA
90ns/300µA (NOTE 1)
HM1-65162C-9
-
8403603JA
HM4-65162C-9
8403603ZA
PKG. NO.
F24.6
F24.6
F24.6
J32.A
J32.A
Pinouts
HM-65162
(CERDIP)
TOP VIEW
HM-65162
(CLCC)
TOP VIEW
PIN DESCRIPTION
A7 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
DQ0 9
DQ1 10
DQ2 11
GND 12
24 VCC
23 A8
22 A9
21 W
20 G
19 A10
18 E
17 DQ7
16 DQ6
15 DQ5
14 DQ4
13 DQ3
4 3 2 1 32 31 30
A6 5
29 A8
A5 6
28 A9
A4 7
27 NC
A3 8
26 W
A2 9
25 G
A1 10
24 A10
A0 11
23 E
NC 12
22 DQ7
DQ0 13
21 DQ6
14 15 16 17 18 19 20
NC No Connect
A0 - A10 Address Input
E Chip Enable/Power Down
VSS/GND Ground
DQ0 - DQ7 Data In/Data Out
VCC
W
Power (+5V)
Write Enable
G Output Enable
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-1
File Number 3000.1
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HM-65162
Functional Diagram
A1
A2
A3
A4
A5
A6
A7
E
G
ROW
ADDRESS
BUFFER
A
7
ROW
DECODER 128
A
7
128 X 128
MEMORY ARRAY
128
COLUMN DECODER
AND DATA
INPUT / OUTPUT (X8)
4
A
4
A
COLUMN
ADDRESS BUFFER
W
A0 A8 A9 A10
1 OF 8
DQ0
THRU
8 DQ7
6-2
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HM-65162
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
Typical Derating Factor . . . . . . . . . . 05mA/MHz Increase in ICCOP
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Thermal Resistance
θJA (oC/W) θJC (oC/W)
CERDIP Package . . . . . . . . . . . . . . . . 48
8
CLCC Package . . . . . . . . . . . . . . . . . . 66
12
Maximum Storage Temperature Range . . . . . . . . .-65oC to +150oC
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . +175oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . +300oC
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range
HM-65162S-9, HM-65162B-9,
HM-65162-9, HM65162C-9. . . . . . . . . . . . . . . . . . -40oC to +85oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26000 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating
and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Specifications VCC = 5V ±10%; TA = -40oC to +85oC (HM-65162S-9, HM-65162B-9, HM-65162-9, HM-65162C-9)
LIMITS
SYMBOL
PARAMETER
MIN
MAX
UNITS
TEST CONDITIONS
ICCSB1 Standby Supply Current
ICCSB
ICCEN
ICCOP
Standby Supply Current
Enabled Supply Current
Operating Supply Current (Note 1)
ICCDR Data Retention Supply Current
VCCDR Data Retention Supply Voltage
- 50 µA HM-65162B-9, IO = 0mA,
E = VCC - 0.3V, VCC = 5.5V
- 100 µA HM-65162S-9, HM65162-9,
IO = 0mA, E = VCC - 0.3V,
VCC = 5.5V
- 900 µA HM-65162C-9, IO = 0mA,
E = VCC - 0.3V, VCC = 5.5V
- 8 mA E = 2.2V, IO = 0mA, VCC = 5.5V
- 70 mA E = 0.8V, IO = 0mA, VCC = 5.5V
- 70 mA E = 0.8V, IO = 0mA, f = 1MHz,
VCC = 5.5V
- 20 µA HM-65162B-9, IO = 0mA,
VCC = 2.0V, E = VCC - 0.3V
- 40 µA HM-65162S-9, HM-65162-9,
IO = 0mA, VCC = 2.0V,
E = VCC - 0.3V
- 300 µA HM-65162C-9, IO = 0mA,
VCC = 2.0V, E = VCC - 0.3V
2.0 -
V
II
IIOZ
VIL
VIH
VOL
VOH1
VOH2
Input Leakage Current
Input/Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output High Voltage (Note 2)
-1.0
-1.0
-0.3
2.2
-
2.4
VCC -0.4
+1.0
+1.0
0.8
VCC +0.3
0.4
-
-
µA VI = VCC or GND, VCC = 5.5V
µA VIO = VCC or GND, VCC = 5.5V
V VCC = 4.5V
V VCC = 5.5V
V IO = 4.0mA, VCC = 4.5V
V IO = -1.0mA, VCC = 4.5V
V IO = -100µA, VCC = 4.5V
Capacitance TA = +25oC
SYMBOL
PARAMETER
CI Input Capacitance (Note 2)
CIO Input/Output Capacitance (Note 2)
NOTES:
1. Typical derating 5mA/MHz increase in ICCOP.
2. Tested at initial design and after major design changes.
MAX
10
12
UNITS
pF
pF
TEST CONDITIONS
f = 1MHz, All measurements are
referenced to device GND
6-3
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