x 1-bit. HM621400H Datasheet

HM621400H 1-bit. Datasheet pdf. Equivalent

HM621400H Datasheet
Recommendation HM621400H Datasheet
Part HM621400H
Description 4M High Speed SRAM (4-Mword x 1-bit)
Feature HM621400H; HM621400H Series 4M High Speed SRAM (4-Mword × 1-bit) ADE-203-787D (Z) Rev. 1.0 Sep. 15, 1998 Descr.
Manufacture Hitachi Semiconductor
Datasheet
Download HM621400H Datasheet




Hitachi Semiconductor HM621400H
HM621400H Series
4M High Speed SRAM (4-Mword × 1-bit)
ADE-203-787D (Z)
Rev. 1.0
Sep. 15, 1998
Description
The HM621400H is a 4-Mbit high speed static RAM organized 4-Mword × 1-bit. It has realized high speed
access time by employing CMOS process (4-transistor + 2-poly resistor memory cell)and high speed circuit
designing technology. It is most appropriate for the application which requires high speed and high density
memory, such as cache and buffer memory in system. The HM621400H is packaged in 400-mil 32-pin SOJ
for high density surface mounting.
Features
Single 5.0 V supply : 5.0 V ± 10 %
Access time 10/12/15 ns (max)
Completely static memory
No clock or timing strobe required
Equal access and cycle times
Directly TTL compatible
All inputs and outputs
Operating current: 200/180/160 mA (max)
TTL standby current: 70/60/50 mA (max)
CMOS standby current: 5 mA (max)
: 1.2 mA (max) (L-version)
Data retension current: 0.8 mA (max) (L-version)
Data retension voltage: 2 V (min) (L-version)
Center VCC and VSS type pinout



Hitachi Semiconductor HM621400H
HM621400H Series
Ordering Information
Type No.
HM621400HJP-10
HM621400HJP-12
HM621400HJP-15
HM621400HLJP-10
HM621400HLJP-12
HM621400HLJP-15
Access time
10 ns
12 ns
15 ns
10 ns
12 ns
15 ns
Package
400-mil 32-pin plastic SOJ (CP-32DB)
Pin Arrangement
HM621400HJP/HLJP Series
A0 1
A1 2
A2 3
A3 4
A4 5
A5 6
CS 7
VCC 8
VSS 9
Din 10
WE 11
A6 12
A7 13
A8 14
A9 15
A10 16
32 A21
31 A20
30 A19
29 A18
28 A17
27 A16
26 OE
25 VSS
24 VCC
23 Dout
22 A15
21 A14
20 A13
19 A12
18 A11
17 NC
(Top view)
2



Hitachi Semiconductor HM621400H
Pin Description
Pin name
A0 to A21
Din
Dout
CS
OE
WE
VCC
VSS
NC
Function
Address input
Data input
Data output
Chip select
Output enable
Write enable
Power supply
Ground
No connection
HM621400H Series
Block Diagram
(LSB)
A2
A18
A8
A12
A17
A3
A7
A6
(MSB)
Din
Row
decoder
CS
Memory matrix
256 rows × 64 columns ×
256 blocks × 1 bit
(4,194,304 bits)
Column I/O
Column decoder
Internal
voltage
generater
VCC
VSS
Dout
CS
A11 A9 A10A20 A21 A0 A13 A14 A15 A1 A19 A16 A4A5
CS (LSB)
WE
(MSB)
OE
CS
3







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