Document
CXP825P40
CMOS 8-bit Single Chip Microcomputer
Description The CXP825P40 is a highly integrated CMOS 8-bit single chip microcomputer which is mainly composed of an 8-bit CPU, PROM, RAM, and I/O ports. This microcomputer features many other high-performance circuits in a single chip CMOS design, including an A/D converter, serial interface, timer/counter, timebase timer, capture timer/counter, fluorescent display tube controller/driver, remote control receiver. Also, the CXP825P40 provides the power-on reset function as well as the sleep/stop function which assures reduced power consumption. Being a PROM-incorporated version of the CXP82540 which has on-chip mask ROM, the CXP825P40 permits program writing. Therefore, it is ideally suited for use in system development stage evaluation and job lot procuction. 80 pin QFP (Plastic)
Structure Silicon gate CMOS IC
Features • Instruction set which supports a wide array of data types 213 types — 16-bit arithmetic instruction/multiplication and division instructions/boolean bit operation instruction • Minimum instruction cycle During operation 400ns/10MHz • Incorporated PROM capacity 40K bytes • Incorporated RAM capacity 1120 bytes (Including the fluorescent display data area) • Peripheral functions — A/D converter 8-bit, 8-channel, successive comparison type (conversion time: 32µs at 10MHz) — Serial interface 1-channel data interface with an 8-bit, 8-stage FIFO (1 to 8 bytes automatic transfer) 1 channel, 8-bit clock synchronized interface — Timers 8-bit timer 8-bit timer/counter 19-bit time-base timer 16-bit capture timer/counter — Fluorescent display tube controller/driver Display of up to 336 segments 1 to 16 digits dynamic display Dimmer function High voltage tolerance output (40V) Built-in pull-down resistor — Remote control receiver Built-in noise suppressor circuit Built-in 8-bit pulse counter and 6-stage FIFO • Interrupts 14 factors, 15 vectors, multiple interrupt processing • Standby mode Sleep/stop • Package 80-pin plastic QFP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E92Y33A79-PS
Block Diagram
SPC700 CPU CORE
T0 to T7 RAM 80 BYTES
8
CLOCK GENERATOR/ SYSTEM CONTROL
PORT A
AN0 to AN7
8
A/D CONVERTER
INT0 INT1 INT2 INT3
EXTAL XTAL RST VDD Vpp VSS
8
PA0 to PA7
S0 to S20
21
FDP CONTROLLER/ DRIVER
VFDP FIFO PROM 40K BYTES
PORT B
T8/S28 T15/S21
8
7
PB0 to PB6 PB7
8
PC0 to PC7
REMOCON
RAM 1120 BYTES
PORT C
RMC
INTERRUPT CONTROLLER
SI1 SO1 SCK1 2
EC0
8 BIT TIMER 1 2
PORT F
8 BIT TIMER/COUNTER 0
PORT E
TO CINT EC1
16 BIT CAPTURE TIMER/COUNTER 2
PORT G
–2–
FIFO PRESCALER/ TIME BASE TIMER
CS0 SI0 SO0 SCK0
SERIAL INTERFACE UNIT 0
PORT D
8
PD0 to PD7
6 2
PE0 to PE5 PE6 to PE7
SERIAL INTERFACE UNIT 1
8
PF0 to PF7
4
PG0 to PG3
CXP825P40
CXP825P40
Pin Assignment (Top View)
PE1/EC1/INT1 PE0/EC0/INT0
PE2/IN2
PG3
Vpp
VDD
VFDP
PG2
PG1
PG0
T0
T1
T2
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 PE3/INT3 PE4/RMC PE5 PE6 PE7/TO PB0/CINT PB1/CS0 PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PC0/KR0 PC1/KR1 PC2/KR2 PC3/KR3 PC4/KR4 PC5/KR5 PC6/KR6 PC7/KR7 PA0/AN0 PA1/AN1 PA2/AN2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 T6 T7 T8/S28 T9/S27 T10/S26 T11/S25 T12/S24 T13/S23 T14/S22 T15/S21 S20 S19 S18 S17 S16 PF7/S15 PF6/S14 PF5/S13 PF4/S12 PF3/S11 PF2/S10 PF1/S9 PF0/S8 PD7/S7
PA4/AN4
PA3/AN3
PA7/AN7
PD1/S1
PD2/S2
PD3/S3
PD4/S4
EXTAL
XTAL
RST
T3
T4 PD5/S5
PA6/AN6
Note) Vpp (Pin 73) is always connected to VDD.
PA5/AN5
–3–
PD0/S0
PD6/S6
VSS
T5
CXP825P40
Pin Description Symbol PA0/AN0 to PA7/AN7 PB0/CINT PB1/CS0 PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PC0/KR0 to PC7/KR7 I/O (Port A) 8-bit I/O port; single bit addressable. (8 pins) Description Analog input to A/D converter. (8 pins) External capture input for 16-bit timer/counter. Chip select input for serial interface (CH0). (Port B) Single bit addressable from amongst lower 7 bits; highest bit (PB7) dedicated to output. (8 pins) Serial clock (CH0) I/O. Serial data (CH0) input. Serial data (CH0) output. Serial clock (CH1) I/O. Serial data (CH1) input. Serial data (CH1) output. (Port C) 8-bit I/O port; single bit addressable. Can provide 12mA sink current. (8 pins)
I/O/Analog input
I/O/Input I/O/Input I/O/I/O I/O/Input I/O/Output I/O/I/O I/O/Input Output/Output
I/O/Input
Key return input for FDP segment signal which performs key scanning.
PE0/INT0/EC0 Input/Input/Input PE1/INT1/EC1 Input/Input/Input PE2/INT2 PE3/INT3 PE4/RMC PE5 PE6 PE7/TO Input/.