Document
CXP877P48A
CMOS 8-bit Single Chip Microcomputer
Description The CXP877P48A is a CMOS 8-bit microcomputer which consists of A/D converter, serial interface, timer/counter, time base timer, vector interruption, high precision timing pattern generation circuit, PWM generator, PWM for tuner, VISS/VASS circuit, 32kHz timer/event counter, remote control receiving circuit, VCR vertical sync separation circuit and the measuring circuit which measure signals of capstan FG and drum FG/PG and other servo systems, as well as basic configurations like 8-bit CPU, PROM, RAM and I/O port. They are integrated into a single chip. Also CXP877P48A provides sleep/stop function which enables to lower power consumption and ultra low speed instruction mode in 32kHz operation. This IC is the PROM-incorporated version of the CXP87748A with built-in mask ROM. This provides the additional feature of being able to write directly into the program. Thus, it is most suitable for evaluation use during system development and for small-quantity production. 100 pin QFP (PIastic) 100 pin LQFP (PIastic)
Structure Silicon gate CMOS IC
Features • A wide instruction set (213 instructions) which cover various types of data — 16-bit arithmetic instruction/multiplication and division instructions/boolean bit operation instruction • Minimum instruction cycle During operation 333ns/12MHz (Supply voltage 3.0 to 5.5V) During operation 250ns/16MHz (Supply voltage 4.5 to 5.5V) During operation 122µs/32kHz • Incorporated PROM capacity 48Kbytes • Incorporated RAM capacity 1344bytes • Peripheral functions — A/D converter 8-bit, 12-channel, successive approximation system (Conversion time 20.0µs/16MHz) — Serial interface Incorporated 8-bit and 8-stage FIFO (1 to 8 bytes auto transfer), 1-channel 8-bit serial I/O, 1-channel — Timer 8-bit timer, 8-bit timer/counter, 19-bit time base timer 32kHz timer/counter — High precision timing pattern generator PPG 19 pins 32-stage programmable RTG 5-pins 2-channel — PWM/DA gate output 12-bit, 2-channel (Repetitive frequency 62kHz/16MHz) — Servo input control Capstan FG, Drum FG/PG, CTL input — VSYNC separator — FRC capture unit Incorporated 26-bit and 8-stage FIFO — PWM output 14-bit, 1-channel — VISS/VASS circuit Pulse duty auto detection circuit — Remote control receiving circuit 8-bit pulse measuring counter, 6-stage FIFO • Interruption 21 factors, 15 vectors, multi-interruption possible • Standby mode SLEEP/STOP • Package 100-pin plastic QFP/LQFP
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E95107-PS
Block Diagram
AVDD
AVREF
PI4/INT1/NMI PE1/INT2
AVss
PE0/INT0
AN0 to AN3
PORT A
PF0/AN4 to PF7/AN11 2 8 SPC7.