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CY37192 Datasheet > High-Performance CPLDs

CY37192 | Cypress Semiconductor

5V/ 3.3V/ ISR High-Performance CPLDs

Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (ISR™) CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes • High density — 32 to 512 macrocells — 32 to 264 I/O pins — Five dedicated inputs including four clock pins • Simple timing model — No fanout delays — No.



Download CY37192 Datasheet
Download CY37192 Datasheet


CY37192



CY37192 | Cypress Semiconductor
5V/ 3.3V/ ISR High-Performance CPLDs
Download CY37192 Datasheet
Download CY37192 Datasheet
Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (.
Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (ISR™) CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes • High density — 32 to 512 macrocells — 32 to 264 I/O pins — Five dedicated inputs including four clock pins • Simple timing model — No fanout delays — No expander delays — No dedicated vs. I/O pin delays.


CY37192P160-125AC | Cypress Semiconductor
5V/ 3.3V/ ISR High-Performance CPLDs
Download CY37192P160-125AC Datasheet
Download CY37192P160-125AC Datasheet
Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (.
Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (ISR™) CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes • High density — 32 to 512 macrocells — 32 to 264 I/O pins — Five dedicated inputs including four clock pins • Simple timing model — No fanout delays — No expander delays — No dedicated vs. I/O pin delays.


CY37192P160-125AI | Cypress Semiconductor
5V/ 3.3V/ ISR High-Performance CPLDs
Download CY37192P160-125AI Datasheet
Download CY37192P160-125AI Datasheet
Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (.
Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (ISR™) CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes • High density — 32 to 512 macrocells — 32 to 264 I/O pins — Five dedicated inputs including four clock pins • Simple timing model — No fanout delays — No expander delays — No dedicated vs. I/O pin delays.


CY37192P160-154AC | Cypress Semiconductor
5V/ 3.3V/ ISR High-Performance CPLDs
Download CY37192P160-154AC Datasheet
Download CY37192P160-154AC Datasheet
Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (.
Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (ISR™) CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes • High density — 32 to 512 macrocells — 32 to 264 I/O pins — Five dedicated inputs including four clock pins • Simple timing model — No fanout delays — No expander delays — No dedicated vs. I/O pin delays.


CY37192P160-83AC | Cypress Semiconductor
5V/ 3.3V/ ISR High-Performance CPLDs
Download CY37192P160-83AC Datasheet
Download CY37192P160-83AC Datasheet
Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (.
Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features • In-System Reprogrammable™ (ISR™) CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes • High density — 32 to 512 macrocells — 32 to 264 I/O pins — Five dedicated inputs including four clock pins • Simple timing model — No fanout delays — No expander delays — No dedicated vs. I/O pin delays.






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