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CY6264 Datasheet > Static RAM

CY6264 | Cypress Semiconductor

8K x 8 Static RAM

1CY 626 4 PRELIMINARY CY6264 8K x 8 Static RAM Features • 55, 70 ns access times • CMOS for optimum speed/power • Easy memory expansion with CE1, CE2, and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected over 70% when deselected. The CY6264 is packaged in a 450-mil (300-mil body) SOIC. An active LOW write enable signal (WE) controls the writing/reading oper.



Download CY6264 Datasheet
Download CY6264 Datasheet


CY6264



CY6264 | Cypress Semiconductor
8K x 8 Static RAM
Download CY6264 Datasheet
Download CY6264 Datasheet
1CY 626 4 PRELIMINARY CY6264 8K x 8 Static RAM Features • 55, 70 ns access times • CMOS for optim.
1CY 626 4 PRELIMINARY CY6264 8K x 8 Static RAM Features • 55, 70 ns access times • CMOS for optimum speed/power • Easy memory expansion with CE1, CE2, and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected over 70% when deselected. The CY6264 is packaged in a 450-mil (300-mil body) SOIC. An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE1 and WE inputs are bo.






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