AN5352N

MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR APPLICATION NOTE Order this document by AN535/D AN535 PhaseĆLocked Loop Design Fundamentals Prepared by: Garth Nash Applications Engineering ABSTRACT The fundamental design concepts for phase-locked loops implemented with integrated circuits are outlined. The necessary equations required to evaluate the basic loop performance are given in conjunction with a brief design example. The parameters in Figure 1 are defined and will be used throughout the text. θi(s) + – θe(s) G(s) θo(s) Freescale Semiconductor, Inc... INTRODUCTION The purpose of this application note is to provide the electronic system designer with the necessary tools to design and evaluate Phase-Locked Loops (PLL) configured with integrated circuits. The majority of all PLL design problems can be approached using the Laplace Transform technique. Therefore, a brief review of Laplace is included to establish a common reference with the reader. Since the scope of this article is practical in nature all theoretical derivations have been omitted, hoping to simplify and clarify the content. A bibliography is included for those who desire to pursue the theoretical aspect. θi(s) θe(s) θo(s) G(s) H(s) H(s) Phase Input Phase Error Output Phase Product of the Individual Feed Forward Transfer Functions Product of the Individual Feedback Transfer Functions Figure 1. Feedback System Using servo theory, the following relationships can be obtained.2 1 q (s) qe(s) + ...