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AN5757S Dataheets PDF



Part Number AN5757S
Manufacturers Panasonic Semiconductor
Logo Panasonic Semiconductor
Description CRT horizontal deflection voltage controller
Datasheet AN5757S DatasheetAN5757S Datasheet (PDF)

MICROCONTROLLERS Aug 10, 2001 App Note 101: Using the Secure Microcontroller Watchdog Timer The Secure Microcontroller Family (DS5000FP, DS5001FP, DS5002FP, and associated modules) integrate an internal watchdog timer to prevent code execution errors. The watchdog timer uses the high precision crystal oscillator that is also used by the microcontroller. This eliminates the need for a RC oscillator while providing greater accuracy. Overview Microcontrollers are often used in harsh environments.

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MICROCONTROLLERS Aug 10, 2001 App Note 101: Using the Secure Microcontroller Watchdog Timer The Secure Microcontroller Family (DS5000FP, DS5001FP, DS5002FP, and associated modules) integrate an internal watchdog timer to prevent code execution errors. The watchdog timer uses the high precision crystal oscillator that is also used by the microcontroller. This eliminates the need for a RC oscillator while providing greater accuracy. Overview Microcontrollers are often used in harsh environments where power supply transients, electromagnetic interference (EMI), and electrostatic discharge (ESD) are abundant. Program corruption caused by bus corruption and electromagnetic discharges can cause a microprocessor to execute erroneous instructions. In these environments, a watchdog timer is a useful peripheral that can help catch and reset a microcontroller that has gone "out of control." A watchdog timer is a simple countdown timer which is used to reset a microprocessor after a specific interval of time. In a properly operating system, software will periodically "pet" or restart the watchdog timer. After being restarted, the watchdog will begin timing another predetermined interval. When software or the device is not functioning correctly, software will not restart the watchdog timer before it times out. When the watchdog timer times out, it will cause a reset of the microcontroller. If the system software has been designed correctly and there has been no hardware failure, the reset will cause the system to operate properly again. The reset condition must be a "safe" state. For instance, it would not be wise to have the reset state of a magnetic stripe card reader enabling the write head. Many systems have been designed using an external watchdog timer. The Secure Microcontroller family eliminates the need for external components by incorporating an internal watchdog timer. By moving the watchdog timer inside the microcontroller, the number of devices in the system is reduced, increasing the overall system reliability. The watchdog timer can take advantage of the high-precision crystal oscillator used by the microcontroller, rather than the imprecise RC oscillator used by most independent watchdog timers. The operation of the watchdog timer is independent of the microcontroller, unless specifically addressed via the Timed Access procedure. The possibility of an out-of-control microcontroller accidentally disabling the watchdog timer is less than 1 in 7.2 X 1016. This application note describes the features and use of the Secure Microcontroller’s watchdog timer. General Use of a Watchdog Timer The primary application of a watchdog timer is as a system monitor to detect and reset an "out of control" microprocessor. When program execution goes awry it will not properly execute the code that restarts the watchdog. In such a case the watchdog timer will timeout and cause a microcontroller reset. In a properly designed system, the reset will correct the error. Regardless of how capable a watchdog timer might be, there are certain failures that cannot be corrected by a reset. For instance, a watchdog timer cannot prevent or detect the corruption of data memory. Unless corruption of data affects program flow, or some extra measures are taken, data corruption will not cause a watchdog timeout. Of course, self-diagnostic software can be written in such a way as to make restarting the watchdog contingent on verification of data memory. While many applications implement such a data verification scheme, it is beyond the scope of this document. It should be remembered that a watchdog timer cannot detect a fault instantaneously. By definition, the watchdog timer must reach the end of its timeout interval before it resets the processor. The system designer should be aware of the maximum time interval that can occur between the execution of a bad instruction and the watchdog timer reset. Placing the Restart Instructions In the Secure Microcontroller family the watchdog timer is driven by the main system clock. The timeout interval is fixed at 122,800 machine cycles (1,473,600 external clock cycles). When the timeout is reached a reset will occur. Table 1 shows the reset time intervals associated with different crystal frequencies. Table 1. Watchdog Timeout Intervals Clock Frequency 16.0000 MHz 14.7456 MHz 11.0592 MHz 7.73280 MHz 5.52960 MHz 1.84320 MHz Timeout Interval 92 ms 100 ms 133 ms 191 ms 266 ms 800 ms A primary concern is the location of the watchdog timer reset command (setting the RWT bit) in the software. The most desirable approach is to have a single location within the main loop of the system software that restarts the watchdog timer periodically. The time required to pass through the main program loop must be less than the timeout interval or the device will reset itself during normal operation. In some systems, however, the program flow is not linear enough to allow the placement of a single watchdog timer r.


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