D1003UK Datasheet (data sheet) PDF





D1003UK Datasheet, METAL GATE RF SILICON FET

D1003UK   D1003UK  

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TetraFET D1003UK METAL GATE RF SILICON FET MECHANICAL DATA A B C 1 2 D E 4 M 3 GOLD METALLISED MULTI-PURPOSE SI LICON DMOS RF FET 60W – 28V – 175MH z SINGLE ENDED FEATURES • SIMPLIFIED AMPLIFIER DESIGN F G H K I J • SUITABLE FOR BROAD BAND APPLICATIONS LOW Crss • SIMPLE BIAS CIRCUITS LOW NOISE DM PIN 1 PIN 3 SOURCE SOUR CE PIN 2 PIN 4 DRAIN GATE DIM A B C D E F G H I J K M mm 24.76 18.42 45° 6. 35 3.17 Dia. 5.71 12.7 Dia. 6.60 0.13 4 .32 3.17 26.16 Tol. 0.13 0.13 5° 0.13 0.13 0.13 0.13 REF 0.02 0.13 0.13 0.25 Inches 0.975 0.725 45° 0.25 0.125 Di a. 0.225 0.500 Dia. 0.260 0.005 0.170 0 .125 1.03 Tol. 0.005 0.005 5° 0.005 0.005

D1003UK Datasheet, METAL GATE RF SILICON FET

D1003UK   D1003UK  
0.005 0.005 REF 0.001 0.005 0.005 0.010 • HIGH GAIN – 16 dB MINIMUM APPL ICATIONS • HF/VHF COMMUNICATIONS from 1 MHz to 175 MHz ABSOLUTE MAXIMUM RAT INGS (Tcase = 25°C unless otherwise st ated) PD BVDSS BVGSS ID(sat) Tstg Tj Po wer Dissipation Drain – Source Breakd own Voltage Gate – Source Breakdown V oltage Drain Current Storage Temperatur e Maximum Operating Junction Temperatur e 117W 70V ±20V 15A –65 to 150°C 20 0°C Semelab plc. Telephone +44(0)145 5 556565. Fax +44(0)1455 552612. Websit e: http://www.semelab.co.uk E-mail: sal es@semelab.co.uk Prelim. 6/99 D1003UK ELECTRICAL CHARACTERISTICS (Tcase = 2 5°C unless otherwise stated) Parameter Test Conditions Min. BVDSS IDSS IGSS g fs GPS η Ciss Coss Crss Drain–Source Breakdown Voltage Zero Gate Voltage Dr ain Current Gate Leakage Current Forwar d Transconductance * Common Source Powe r Gain Drain Efficiency Input Capacitan ce Output Capacitance Reverse Transfer Capacitance VGS = 0 VDS = 28V VGS = 20V ID = 10mA VDS = 10V PO = 60W VDS = 28V f = 175MHz VDS = 0 VDS = 28V VDS = 28V VGS = –5V f = 1MHz VGS = 0 VGS = 0 f = 1MHz f = 1MHz IDQ = 0.3A ID = 100mA VGS = 0 VDS = 0 VDS = VGS ID = 3A 1 2.4 16 50 20:1 70 Typ. Max. Unit V 1 1 7 mA µA V S dB % — 180 90 7.5 pF pF p F VGS(th) Gate Threshold Voltage * VSWR Load Mismatch Tolerance * Pulse T








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