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CXA3010Q
Read/Write Amplifier (with Built-in Filters) for FDDs For the availability of this product, please contact the sales office.
Description The CXA3010Q is a monolithic IC designed for use with three-mode Floppy Disk Drives, and contains a read circuit (with a four-mode filter system), a write circuit, an erase circuit, and a supply voltage detection circuit, all on a single chip. Features • Single 5V power supply • Filter system can be switched among four modes: 1M, 1.6M/2M, which are each inner track/outer track • Filter characteristics can be set to Chebyshev (1dB ripple) for 1.6M, 2M/inner track only, and to Butterworth for the other modes • A custom selection can be made between Chebyshev (1dB ripple) and Butterworth for the filter characteristics for 1.6M, 2M/inner track only • Permits customization of the fc ratio • Low preamplifier input conversion noise voltage of 2.0nV/√ Hz (typ.) keeps read data output jitter to a minimum • Preamplifier voltage gain can be switched between 39dB and 45dB • In inner track mode (OTF = Low), the voltage gain is boosted by 3dB, making it possible to minimize peak shift in inner tracks. • Time domain filter can be switched between two modes: 1M, 1.6M/2M • Write current can be switched among three modes: 1M/1.6M/2M. The inner/outer track current ratio is fixed for each mode, but can be customized. • Erase current can be set by an external resistor, and remains constant. In addition, the current rise time Tr and fall time Tf are determined according to the head inductance and current. (Refer to page 20.) • Damping resistor can be built in. Resistance can be customized between 2kΩ and 15kΩ in 1kΩ steps. A damping resistor can not be connected to this IC, however. • Supply voltage detection circuit 32 pin QFP (Plastic)
Applications Three-mode FDDs Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta = 25°C) 7.0 V • Supply voltage VCC • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 500 mW • Digital signal input pin Input voltage –0.5 to VCC + 0.3 V • Power ON output voltage applied VCC + 0.3 V • Erase output voltage applied VCC + 0.3 V • Write head voltage applied 15 V • Write current IW 20 mAo-p • Erase current IE 30 mA • Power on output current 7 mA Operating Conditions Supply voltage
4.4 to 6.0
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E94Y32A52-ST
CXA3010Q
Block Diagram and Pin Configuration
PREOUTA
HEAD1B
24 WCLD 25
23
22
21
20
19
18
17 16 NC
WCMD 26 PREAMP WCHD 27
FILTER DIFF + LPF (BPF)
PREOUTB
HEAD0A
HEAD0B
HEAD1A
X360
XHG
15
FILTER OUTA
FILTER 14 OUTB
IESET 28
WRITE DRIVER
13 COMP 12
A.GND
D.GND 29
MMVA
ERA0 30
ERASE DRIVER POWER MONITOR CONTROL LOGIC TIME DOMAIN FILTER
11 FCSET
ERA1 31
10
VCC
XPS 32 1 2 3 4 5 6 7 8
9
XHD
XWD
POWER ON
XWG
XEG
–2–
OTF
RD
XCI
XS1
CXA3010Q
Pin Description Pin No. Symbol Pin voltage Equivalent circuit
VCC 100k 1
Description
1
POWER ON
—
Reduced voltage detection output. This is an open collector pin that outputs a low signal when VCC is below the specified value.
A.GND
VCC
2
XWD
—
1k 2 2.3V
Write data input. This pin is a Schmitt-type input that is triggered when the logical voltage goes from High to Low.
A.GND
VCC 140
3
RD
—
3
Read data output. This pin is active when the logical voltage of the write gate signal and the erase gate signal is High.
D.GND
4
XCI
—
Write current control. The write current increases when the logical voltage is Low. Write gate signal input. The write system becomes active when the logical voltage is Low.
VCC 4 5 6 7 8 9 A.GND 2.1V 1k 100k
5
XWG
—
6
XEG
—
Erase gate signal input. The erase system becomes active when the logical voltage is Low. Head side switching signal input. The HEAD1 system is active when the logical voltage is Low, and the HEAD0 system is active when the logical voltage is High, but only when the logical voltage for the write gate and the erase gate is High. Filter inner track/outer track mode control. Inner track mode is selected when the logical voltage is Low. Filter, time domain filter and write current 1M/2M mode control. 2M mode is selected when the logical voltage is Low.
7
XS1
—
8
OTF
—
9
XHD
—
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CXA3010Q
Pin No.
Symbol
Pin voltage
Equivalent circuit
VCC
Description Filter, time domain filter and write current 1M/1.6M mode control. 1.6M mode is selected when the logical voltage is Low. Preamplifier voltage gain selection. Gain is boosted by 6dB when the logical voltage is Low compared to when the logical voltage is High. Power supply (5V) connec.