CXD1961AQ

CXD1961AQ DVB-S Frontend IC (QPSK demodulation + FEC) Preliminary For the availability of this product, please contact the sales office. Description The CXD1961AQ is a single chip DVB compliant Satellite Broadcasting Frontend IC, including dual A/D converter for analog baseband I/Q input, QPSK demodulator, Viterbi decoder Reed-Solomon decoder and Energy Dispersal descrambler. It is suitable for use in a DVB Integrated Receiver Decoder. 100 pin QFP (Plastic) Features Dual 6 bit A/D converter Absolute Maximum Rating (Ta = 25°C, GND = 0V) QPSK demodulator Power Supply VDD –0.5 to +4.6 V Multi-symbol rate operation Input Voltage VIN –0.5 to VDD + 0.5 V Nyquist Roll off filter (α = 0.35) Output Voltage VOUT –0.5 to VDD + 0.5 V Clock recovery circuit I/O Voltage VI/O –0.5 to VDD + 0.5 V Carrier recovery circuit CPU I/F pin Vcpuif –0.5 to +5.5 V AGC control (PWM output) Storage Temperature Tstg –55 to +150 °C Viterbi decoder Constraint length 7 Recommended Operating Condition Truncation length 144 (Ta = 0 to 75°C, GND = 0V) BER monitor of QPSK demodulator output Power Supply VDD 3.15 to 3.45 V Frame synchronization circuit Input High level VIH 0.7 × VDD to VDD + 0.5 V Convolutional de-interleaver Input Low level VIL 0.3 to 0.2 × VDD V Reed-Solomon decoder (204,188) BER monitor of Viterbi decoder output Energy dispersal descrambler CPU interface circuit I2C bus interface (5V input capability) Package QFP 100pin Operating frequency 20 to 30MSPS ...