CXL1506N

CXL1506M/N CMOS-CCD 1H/2H Delay Line for PAL For the availability of this product, please contact the sales office. Description The CXL1506M/N is a CMOS-CCD delay line developed for video signal processing. Usage in conjunction with an external low pass filter provides 1H and 2H delay signals simultaneously (For PAL signals). Features Single power supply (5V) Low power consumption Built-in peripheral circuits Built-in tripling PLL circuit For PAL signals 1 input and 2 outputs (Outputs for both 1H and 2H delays) Absolute Maximum Ratings (Ta = 25°C) Supply voltage VDD 6 V Operating temperature Topr –10 to +60 °C Storage temperature Tstg –55 to +150 °C Allowable power dissipation PD CXL1506M 400 mW CXL1506N 300 mW Recommended Operating Voltage (Ta = 25°C) VDD 5 ± 0.25 CXL1506M 16 pin SOP (Plastic) CXL1506N 20 pin SSOP (Plastic) Blook Diagram CXL1506N CXL1506M V Recommended Clock Conditions (Ta = 25°C) Input clock amplitude VCLK 0.2 to 1.0Vp-p (0.4Vp-p Typ.) Input clock frequency fCLK 4.433619 MHz Input clock waveform sine wave Input Signal Amplitude VSIG 575 (Max.) mVp-p (at internal clamp condition) VSS 16 AB 15 VDD 14 VCO IN 13 PC OUT 12 VSS 11 CLK 10 PLL VDD 9 VSS 20 NC 19 AB 18 VDD 17 VCO IN 16 PC OUT 15 VSS 14 NC 13 CLK 12 PLL VDD 11 Autobias circuit Driver Timing Autobias circuit Driver Timing Clamp circuit CCD (1698bits) 847bits Output circuit S/H 1bit 1698bits Output circuit S/H 1bit Bias circuit Clamp circuit CCD...