2SJ244

2SJ244 Silicon P-Channel MOS FET Application High speed power switching Low voltage operation Features Very Low on-resistance High speed switching Suitable for camera or VTR motor drive circuit, power switch, solenoid drive and etc. Outline UPAK 2 1 4 D 1. Gate 2. Drain 3. Source 4. Drain S 3 G 2SJ244 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Channel dissipation Channel temperature Storage temperature Symbol VDSS VGSS ID I D(pulse)* Pch* Tch Tstg 2 1 Ratings –12 ±7 ±2 ±4 1 150 –55 to +150 Unit V V A A W °C °C Notes: 1. PW ≤ 100 µs, duty cycle ≤ 10% 2. Value on the alumina ceramic board (12.5×20×0.7 mm) 3. Marking is “JY”. Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source cutoff current Symbol Min V(BR)DSS V(BR)GSS I GSS –12 ±7 — — –0.4 — — — — — — — — — Typ — — — — — 0.65 0.5 1.8 130 50 260 365 1450 — Max — — ±5 –1 –1.4 0.9 — — — — — — — 7 Unit V V µA µA V Ω Ω S pF pF pF ns ns V I D = –0.2 A*1, Vin = –4 V, RL = 51 Ω I F = 4 A*1, VGS = 0 Test conditions I D = –1 mA, VGS = 0 I G = ±10 µA, VDS = 0 VGS = ±6 V, VDS = 0 VDS = –8 V, VGS = 0 I D = –100 µA, VDS = –5 V I D = –0.5 A*1, VGS = –2.5 V I D = –1 A*1, VGS = –4 V I D = –1 A*1, VDS = –5 V VDS = –5 V, VGS = 0, f = 1 MHz Zero gate voltage drain current I DSS Gate to source cutoff voltage Static drain to source on state resistance Static drain to source on sta...