Document
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK2483
SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE
DESCRIPTION
The 2SK2483 is N-Channel MOS Field Effect Transistor designed for high voltage switching applications. PACKAGE DIMENSIONS (in millimeter)
FEATURES
• Low On-Resistance
RDS (on) = 2.8 Ω (VGS = 10 V, ID = 2.0 A)
10.0±0.3
3.2±0.2
4.5±0.2 2.7±0.2
15.0±0.3
3±0.1 4±0.2
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)
Drain to Source Voltage Gate to Source Voltage Drain Current (DC) Drain Current (pulse)* Total Power Dissipation (Tc = 25 ˚C) Total Power Dissipation (TA = 25 ˚C) Channel Temperature Storage Temperature Single Avalanche Current** Single Avalanche Energy** * PW ≤ 10 µs, Duty Cycle ≤ 1 %
G
VGSS ID(DC) ID(pulse) PT1 PT2 Tch Tstg IAS EAS = 25 Ω, VGS = 20 V → 0
± 30 ± 3.5 ± 10.5 40 2.0 150 3.5 147
V A A W W ˚C A mJ
1 2 3 0.7±0.1 2.54
1.3±0.2 1.5±0.2 2.54
13.5MIN.
VDSS
900
V
12.0±0.2
• Low Ciss Ciss = 1 200 pF TYP. • High Avalanche Capability Ratings • Isolated TO-220 Package
2.5±0.1 0.65±0.1 1. Gate 2. Drain 3. Source
–55 to +150 ˚C
** Starting Tch = 25 ˚C, R
MP-45F (ISOLATED TO-220)
Drain
Body Diode Gate
Source
Document No. D10275EJ1V0DS00 (1st edition) Date Published September 1995 P Printed in Japan
©
1995
2SK2483
ELECTRICAL CHARACTERISTICS (TA = 25 ˚C)
CHARACTERISTIC Drain to Source On-Resistance Gate to Source Cutoff Voltage Forward Transfer Admittance Drain Leakage Current Gate to Source Leakage Current Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge SYMBOL RDS (on) VGS (off) | yfs | IDSS IGSS Ciss Coss Crss td (on) tr td (off) tf QG QGS QGD VF (S-D) trr Qrr 1 200 170 30 20 10 70 15 40 7 17 0.9 580 3.0 2.5 1.0 100 ± 100 MIN. TYP. MAX. 2.8 3.5 UNIT Ω V S TEST CONDITIONS VGS = 10 V, ID = 2.0 A VDS = 10 V, ID = 1 mA VDS = 20 V, ID = 2.0 A VDS = VDSS, VGS = 0 VGS = ± 30 V, VDS = 0 VDS = 10 V VGS = 0 f = 1 MHz ID = 2.0 A VGS = 10 V VDD = 150 V RG = 75 Ω ID = 3.5 A VDD = 450 V VGS = 10 V IF = 3.5 A, VGS = 0 IF = 3.5 A, VGS = 0 di/dt = 50 A/µs
µA
nA pF pF pF ns ns ns ns nC nC nC V ns
µC
Test Circuit 1 Avalanche Capability
D.U.T. RG = 25 Ω PG VGS = 20 - 0 V 50 Ω
Test Circuit 2 Switching Time
D.U.T. L VDD PG. RG RG = 10 Ω RL
VGS
Wave Form
VGS
0 10 % VGS (on) 90 %
VDD
ID
90 % 90 % ID
D Wave Form
BVDSS IAS ID VDD VDS
VGS 0 t t = 1us Duty Cycle ≤ 1 %
I
0
10 % td (on) ton tr td (off) toff
10 % tf
Starting Tch
Test Circuit 3 Gate Charge
D.U.T. IG = 2 mA PG. 50 Ω
RL VDD
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
2
2SK2483
TYPICAL CHARACTERISTICS (TA = 25 ˚C)
DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA
70
dT - Percentage of Rated Power - % PT - Total Power Dissipation - W
TOTAL POWER DISSIPATION vs. CASE TEMPERATURE
1.