Document
2SK3212
Silicon N Channel MOS FET High Speed Power Switching
ADE-208-752 (Z) 1st. Edition February 1999 Features
• Low on-resistance R DS = 0.1 Ω typ. • High speed switching • 4 V gate drive device can be driven from 5 V source
Outline
TO–220FM
D
G
1 2 S
1. Gate 2. Drain 3. Source
3
2SK3212
Absolute Maximum Ratings (Ta = 25°C)
Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Note: Symbol VDSS VGSS ID I D(pulse) I DR I AP
Note3 Note3 Note2 Note1
Ratings 100 ±20 10 40 10 10 10 20 150 –55 to +150
Unit V V A A A A mJ W °C °C
EAR
Pch Tch
Tstg
1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C 3. Value at Tch = 25°C, Rg ≥ 50 Ω
Electrical Characteristics (Ta = 25°C)
Item Symbol Min 100 ±20 — — 1.0 — — 4.5 — — — — — — — — — Typ — — — — — 100 130 7.5 420 185 100 12 60 105 70 0.9 90 Max — — ±10 10 2.5 130 180 — — — — — — — — — — Unit V V µA µA V mΩ mΩ S pF pF pF ns ns ns ns V ns I F = 10 A, VGS = 0 I F = 10 A, VGS = 0 diF/ dt = 50 A/ µs Test Conditions I D = 10 mA, VGS = 0 I G = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 100 V, VGS = 0 I D = 1 mA, VDS = 10 V I D = 5 A, VGS = 10 VNote4 I D = 5 A, VGS = 4 V Note4 I D = 5 A, VDS = 10 V Note4 VDS = 10 V VGS = 0 f = 1 MHz I D = 5 A, VGS = 10 V RL = 10 Ω Drain to source breakdown voltage V(BR)DSS Gate to source breakdown voltage V(BR)GSS Gate to source leak current Zero gate voltege drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Note: 4. Pulse test I GSS I DSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss t d(on) tr t d(off) tf VDF t rr
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2SK3212
Main Characteristics
Power vs. Temperature Derating 40
100 50
Maximum Safe Operation Area
Pch (W)
I D (A)
30
20 10 5 2 1 0.5 0.2
DC
10
PW
Op er
10
=1
ion
0
µs
1
0 m s(
m
µs
Channel Dissipation
20
Drain Current
s
t)
at
1s
ho
(T
10
25 Operation in °C ) this area is limited by R DS(on)
c=
0
0.1 50 100 150 Tc (°C) 200 Case Temperature
Ta = 25 °C 1 2 5 10 20 Drain to Source Voltage 50 100 200 V DS (V)
Typical Output Characteristics 10 10 V 10 Pulse Test 3.5 V 6V 6 4V
Typical Transfer Characteristics V DS = 10 V Pulse Test
I D (A)
ID
3V
(A) Drain Current
8
8
6
Drain Current
4
4
Tc = 75°C –25°C 25°C
2 VGS =2.5 V 0 2 4 6 Drain to Source Voltage 8 10 V DS (V)
2
0
1 2 3 Gate to Source Voltage
4 5 V GS (V)
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2SK3212
Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 500 Pulse Test 200 100 10 V 50 VGS = 4 V
Drain to Source Saturation Voltage V DS(on) (V)
Pulse Test
2.0
1.5
1.0 ID=5A 2A 0 12 4 8 Gate to Source Voltage 1A 16 20 V GS (V)
0.5
Drain to Source On State Resistance R DS(on) (mΩ )
2.5
20 10 0.1 0.2
0.5 1 2 5 10 20 Drain Current I D (A)
50
Static Drain to Source on State Resistance R DS(on) ( mΩ)
Forward Transfer Admittance |y fs | (S)
Static Drain to Source on State Resistance vs. Temperature 500 Pulse Test 400 1, 2 A 300 5A 200 V GS = 4 V
Forward Transfer Admittance vs. Drain Current 50 20 Tc = –25 °C 10 5 75 °C 2 1 0.5 0.1 V DS = 10 V Pulse Test 0.3 1 3 10 30 Drain Current I D (A) 100 25 °C
100 10 V 0 –40
5A 1, 2 A
0 40 80 120 160 Case Temperature Tc (°C)
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2SK3212
Body–Drain Diode Reverse Recovery Time 1000 5000 di / dt = 50 A / µs V GS = 0, Ta = 25 °C 2000 1000 500 200 100 50 20 10 0.3 1 3 10 30 100 Reverse Drain Current I DR (A) 0 VGS = 0 f = 1 MHz 10 20 30 40 50 Coss Crss Ciss Typical Capacitance vs. Drain to Source Voltage
Reverse Recovery Time trr (ns)
200 100 50
20 10 0.1
Capacitance C (pF)
500
Drain to Source Voltage V DS (V)
Dynamic Input Characteristics
Switching Characteristics
V DS (V)
ID=5A V DD = 100 V 50 V 25 V V GS
V GS (V)
200
20
500 300
Switching Time t (ns)
160
16
t d(off) 100 tf 30 10 t d(on) 3 1 0.1 V GS = 10 V, V DD = 30 V PW = 5 µs, duty < 1 % 0.3 3 1 Drain Current 10 I D (A) 30 100 tr
Drain to Source Voltage
120
12
80
8
40
V DD = 100 V 50 V 25 V
4 V DS 0 40
0
8 16 24 32 Gate Charge Qg (nc)
Gate to Source Voltage
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2SK3212
Reverse Drain Current vs. Source to Drain Voltage
Repetive Avalanche Energy E AR (mJ)
Maximun Avalanche Energy vs. Channel Temperature Derating 10 I AP = 10 A V DD = 50 V duty < 0.1 % Rg > 50 Ω
10
Reverse Drain Current I DR (A)
8
8
6
10 V
6
4 5V
V GS = 0, –5 V
4
2
2 0 25
Pulse Test 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage V SD (V)
50
75
100
125
150
Channel Temperature Tch (°C)
Avalanche Test Circuit
Avalanche Waveform VDSS VDSS – V DD
V DS Monitor
L I AP Monitor
EAR =
1 2 • L • I AP • 2
V (BR)DSS I AP VDD ID V DS
Rg Vin 15 V
D. U. T
50 Ω 0 VDD
6.