FDB6035L

April 1998 FDP6035L/FDB6035L N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as DC/DC converters and high efficiency switching circuits where fast switching, low in-line power loss, and resistance to transients are needed. Features 58 A, 30 V. RDS(ON) = 0.011 Ω @ VGS=10 V RDS(ON) = 0.019 Ω @ VGS=4.5 V. Low gate charge (typical 34 nC). Low Crss (typical 175 pF). Fast switching speed. ________________________________________________________________________________ D G S Absolute Maximum Ratings Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed T C = 25°C unless otherwise noted FDP6035L 30 ±20 58 175 75 0.5 -65 to 175 FDB6035L Units V V A Maximum Power Dissipation @ TC = 25°C Derate above 25°C W W/°C °C TJ,TSTG RθJC RθJA Operating and Storage Temperature Range THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient 2 62.5 °C/W °C/W © 1998 Fairchild Semiconductor Corporation FDP6035L Rev.B Electrical Characteristics Symbol Parameter T C = 25°C unless otherwise noted) Conditions Min Typ Max Unit DRAIN-SOURCE ...