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FDD603AL Dataheets PDF



Part Number FDD603AL
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description N-Channel MOSFET
Datasheet FDD603AL DatasheetFDD603AL Datasheet (PDF)

FDD603AL July 1999 FDD603AL N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description This N-Channel logic level enhancement mode power field effect transistor is produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize onstate resistance. These devices are particularly suited for low voltage applications such as DC/DC converters and high efficiency switching circuits where fast switching, low i.

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FDD603AL July 1999 FDD603AL N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description This N-Channel logic level enhancement mode power field effect transistor is produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize onstate resistance. These devices are particularly suited for low voltage applications such as DC/DC converters and high efficiency switching circuits where fast switching, low in-line power loss, and resistance to transients are needed. Features • 33 A, 30 V. RDS(ON) = 0.023 Ω @ VGS = 10 V RDS(ON) = 0.037 Ω @ VGS = 4.5 V. • • • Critical DC electrical parameters specified at elevated temperature. Rugged avalanche-rated internal source-drain diode can eliminate the need for external Zener Diode. High density cell design for extremely low RDS(ON) . Applications • • DC/DC converters Motor drives D D G S TO-252 Absolute Maximum Ratings Symbol V DSS V GSS ID Drain-Source Voltage Gate-Source Voltage Maximum Drain Current - Continuous Maximum Drain Current PD T A = 25 ° C -Pulsed T A = 25 o C T A = 25 o C T J, T stg (Note 1) (Note 1a) T C =25 oC unless otherwise noted G S Parameter Ratings 30 ± 20 33 9.5 80 (Note 1) (Note 1a) (Note 1b) Units V V A Maximum Power Dissipation @ T C = 25 o C 39 3.2 1.3 -55 to +150 W Operating and Storage Junction Temperature Range °C Thermal Characteristics R θJC R θJA Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient (Note 1) (Note 1a) (Note 1b) 2.5 40 96 ° C/W ° C/W ° C/W Package Marking and Ordering Information Device Marking FDD603AL 1999 Fairchild Semiconductor Corporation Device FDD603AL Reel Size 13’’ Tape W idth 16mm Quantity 2500 FDD603AL, Rev. B FDD603AL Electrical Characteristics Symbol W DSS IAR BVDSS ∆BVDSS ∆TJ IDSS IGSSF IGSSR TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 100 12 mJ A V mV/°C 10 100 -100 µA nA nA Off Characteristics Single Pulse Drain-Source VDD = 15 V, ID = 12 A Avalanche Energy Maximum Drain-Source Avalanche Current Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse (Note 2) VGS = 0 V, ID = 250 µA ID = 250µA, Referenced to 25°C VDS = 24 V, VGS = 0 V VGS = 20V, VDS = 0 V VGS = -20 V, VDS = 0 V 30 32 On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance VDS = VGS, ID = 250 µA ID = 250 µA,Referenced to 25°C VGS = 10 V, ID = 9.5 A VGS = 10 V, ID = 9.5 A,TJ=125°C VGS = 4.5 V, ID = 7.5 A VGS = 10 V, VDS = 10 V VDS = 10 V, ID = 9.5 A 1 1.7 -4.5 0.016 0.024 0.026 3 V mV/°C 0.023 0.035 0.037 Ω ID(on) gFS 60 18 A S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VDS = 15 V, VGS = 0 V f = 1.0 MHz 670 345 95 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 15 V, ID = 1 A VGS = 10 V, RGEN = 6 Ω 10 16 27 12 20 30 45 22 26 ns ns ns ns nC nC nC VDS =10 V, ID = 9.5 A VGS = 10 V, 19 3.5 5.5 Drain-Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.3 A ( Note 1) (Note 2) 33 0.78 1.2 A V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the drain tab. RθJC is guaranteed by design while RθCA is determined by the user's board design. RθJC has been used to determine some maximum ratings. a) RθJA= 40oC/W when mounted on a 1in2 pad of 2oz copper. b) RθJA= 96oC/W on a minimum mounting pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% FDD603AL, Rev. B FDD603AL Typical Characteristics 80 I D , DRAIN-SOURCE CURRENT (A) 3 GS RDS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE V =10V 8.0 7.0 6.0 V 2.5 GS = 4.0V 4.5 60 5.0 40 2 5.0 6.0 7.0 8.0 10 4.5 20 1.5 4.0 3.0 1 0 0 1 V DS 0.5 2 3 4 5 0 20 40 I D , DRAIN CURRENT (A) 60 80 , DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.1 R DS(ON) , ON-RESISTANCE (OHM) 1.8 DRAIN-SOURCE ON-RESISTANCE 1.6 1.4 1.2 1 0.8 0.6 -50 R DS(ON) , NORMALIZED I D = 9.5A V GS = 10V I D = 5A 0.08 0.06 0.04 TJ = 125°C 0.02 25°C 0 2 4 6 8 V GS , GATE TO SOURCE VOLTAGE (V) 10 -25 0 25 50 75 100 125 150 T J, JUNCTION TEMPERATURE (°C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 30 I S , REVERSE DRAIN CURRENT.


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