Effect Transistor. FDR4410 Datasheet

FDR4410 Datasheet PDF, Equivalent


Part Number

FDR4410

Description

N-Channel Enhancement Mode Field Effect Transistor

Manufacture

Fairchild Semiconductor

Total Page 4 Pages
PDF Download
Download FDR4410 Datasheet PDF


FDR4410 Datasheet
April 1998
FDR4410
N-Channel Enhancement Mode Field Effect Transistor
General Description
The FDR4410 has been designed as a smaller, low cost
alternative to the popular Si4410DY.
The SuperSOTTM-8 package is 40% smaller than the SO-8
package.
The SuperSOTTM-8 advanced package design and
optimized pinout allow the typical power dissipation to be
similar to the bigger SO-8 package.
Features
9.3 A, 30 V. RDS(ON) = 0.013 @ VGS = 10 V
RDS(ON) = 0.020 @ VGS = 4.5 V.
High density cell design for extremely low RDS(ON).
Proprietary SuperSOTTM-8 small outline surface mount
package with high power and current handling capability.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
S
D
D
S 4410
G
D
D
Dpin 1
SuperSOT TM-8
54
63
72
81
Absolute Maximum Ratings TA = 25oC unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Draint Current - Continuous
- Pulsed
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case (Note 1)
© 1998 Fairchild Semiconductor Corporation
FDR4410
30
±20
9.3
40
1.8
1
0.9
-55 to 150
70
20
Units
V
V
A
W
°C
°C/W
°C/W
FDR4410 Rev.C

FDR4410 Datasheet
Electrical Characteristics (TA = 25OC unless otherwise noted )
Symbol Parameter
Conditions
Min Typ Max Units
OFF CHARACTERISTICS
BVDSS
BVDSS/TJ
IDSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
IGSS Gate - Body Leakage Current
IGSS Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 2)
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25 oC
30
35
V
mV/oC
VDS = 24 V, VGS = 0 V
1 µA
TJ = 55°C
25 µA
VGS = 20 V, VDS = 0 V
100 nA
VGS = -20 V, VDS = 0 V
-100 nA
VGS(th)
VGS(th)/TJ
RDS(ON)
Gate Threshold Voltage
Gate Threshold Voltage Temp.Coefficient
Static Drain-Source On-Resistance
ID(ON) On-State Drain Current
gFS Forward Transconductance
DYNAMIC CHARACTERISTICS
VDS = VGS, ID = 250 µA
ID = 250 µA, Referenced to 25 oC
1 1.5
-4.4
2V
mV/oC
VGS = 10 V, ID = 9.3 A
0.011 0.013
TJ =125°C
0.017 0.02
VGS = 4.5 V, ID = 5 A
0.016 0.02
VGS = 10 V, VDS = 5 V
20
A
VDS = 10 V, ID = 9.3 A
25 S
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
1170
627
180
pF
pF
pF
tD(on) Turn - On Delay Time
tr Turn - On Rise Time
VDD = 25 V, ID = 1 A,
VGS = 10 V, RGEN = 6
tD(off) Turn - Off Delay Time
tf Turn - Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
VDS = 15 V, ID = 9.3 A,
VGS = 10 V
Qgd Gate-Drain Charge
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
12 22 ns
11 20 ns
41 66 ns
34 55 ns
36 50 nC
4.5 nC
10 nC
IS Maximum Continuous Drain-Source Diode Forward Current
1.5 A
VSD Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 1.5 A (Note 2)
0.72 1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by
design while RθCA is determined by the user's board design. RθJA shown below for single device operation on FR-4 board in still air.
a. 70OC/W on a 1 in2 pad of 2oz
copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
b. 125OC/W on a 0.026 in2 of pad
of 2oz copper.
c. 135OC/W on a 0.005 in2 of pad
of 2oz copper.
FDR4410 Rev.C


Features Datasheet pdf April 1998 FDR4410 N-Channel Enhancemen t Mode Field Effect Transistor General Description The FDR4410 has been design ed as a smaller, low cost alternative t o the popular Si4410DY. The SuperSOTTM- 8 package is 40% smaller than the SO-8 package. The SuperSOTTM-8 advanced pack age design and optimized pinout allow t he typical power dissipation to be simi lar to the bigger SO-8 package. Featur es 9.3 A, 30 V. RDS(ON) = 0.013 Ω @ V GS = 10 V RDS(ON) = 0.020 Ω @ VGS = 4 .5 V. High density cell design for extr emely low RDS(ON). Proprietary SuperSOT TM-8 small outline surface mount packag e with high power and current handling capability. SOT-23 SuperSOTTM-6 Supe rSOTTM-8 SO-8 SOT-223 SOIC-16 S D D S 5 6 7 4 3 2 1 10 44 D G pin 1 SuperSOT -8 TM D D 8 Absolute Ma ximum Ratings Symbol VDSS VGSS ID PD Pa rameter Drain-Source Voltage Gate-Sourc e Voltage Draint Current - Continuous - Pulsed Maximum Power Dissipation TA = 25oC unless otherwise noted FDR4410 30 ±20 (Note 1a) Units V V A .
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