FDS6975

February 1999 FDS6975 Dual P-Channel, Logic Level, PowerTrenchTM MOSFET General Description These P-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. These devices are well suited for notebook computer applications: load switching and power management, battery charging circuits, and DC/DC conversion. Features -6 A, -30 V. RDS(ON) = 0.032 Ω @ VGS = -10 V, RDS(ON) = 0.045 Ω @ VGS = -4.5 V. Low gate charge (14.5nC typical). High performance trench technology for extremely low RDS(ON). High power and current handling capability. SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 D2 D2 D1 D1 S FD 75 69 S2 G2 G1 5 6 7 8 4 3 2 1 SO-8 pin 1 S1 Absolute Maximum Ratings Symbol Parameter TA = 25oC unless otherwise noted Ratings Units VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) (Note 1a) -30 ±20 -6 -20 2 1.6 1 0.9 -55 to 150 V V A W TJ,TSTG RθJA RθJC Operating and Storage Temperature Range °C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 °C/W °C/W FDS6975 Rev.C © 1999 Fairchild Semiconductor Corporation Electrical Characteristics (TA =...