Document
FDS8958A
April 2008
FDS8958A
tm
Dual N & P-Channel PowerTrench® MOSFET
General Description
These dual N- and P-Channel enhancement mode power field effect transistors are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize on-state ressitance and yet maintain superior switching performance.
These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required.
Features
• Q1: N-Channel 7.0A, 30V RDS(on) = 0.028Ω @ VGS = 10V RDS(on) = 0.040Ω @ VGS = 4.5V
• Q2: P-Channel -5A, -30V RDS(on) = 0.052Ω @ VGS = -10V RDS(on) = 0.080Ω @ VGS = -4.5V
• Fast switching speed • High power and handling capability in a widely
used surface mount package
DD2DD2 DD1 DD1
SO-8
Pin 1 SO-8
G2
S2 G SS1GS1 S
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
Parameter
VDSS VGSS ID
PD
EAS TJ, TSTG
Drain-Source Voltage Gate-Source Voltage
Drain Current - Continuous - Pulsed
Power Dissipation for Dual Operation Power Dissipation for Single Operation
(Note 1a)
(Note 1a) (Note 1c)
Single Pulse Avalanche Energy
(Note 3)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS8958A
FDS8958A
13”
Q2
5
4
6
3
Q1
7
2
8
1
Q1
Q2
30
30
±20
±20
7
-5
20
-20
2
2
1.6
1.6
0.9
0.9
54
13
-55 to +150
78 40
Tape width 12mm
Units
V V
A
W
mJ °C
°C/W °C/W
Quantity 2500 units
©2008 Fairchild Semiconductor Corporation
FDS8958A Rev F3(W)
FDS8958A
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Type Min Typ Max Units
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
∆BVDSS ∆TJ
IDSS
IGSSF
Breakdown Voltage Temperature Coefficient
Zero Gate Voltage Drain Current Gate-Body Leakage, Forward
IGSSR
Gate-Body Leakage, Reverse
VGS = 0 V,
ID = 250 µA
VGS = 0 V,
ID = -250 µA
ID = 250 µA, Referenced to 25°C
ID = -250 µA, Referenced to 25°C
VDS = 24 V,
VGS = 0 V
VDS = -24 V,
VGS = 0 V
VGS = 20 V,
VDS = 0 V
VGS = -20 V, VDS = 0 V
Q1 30 Q2 -30
Q1
25
Q2
-23
V mV/°C
Q1
1
µA
Q2
-1
All
100 nA
All
-100 nA
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
∆VGS(th) ∆TJ
RDS(on)
Gate Threshold Voltage Temperature Coefficient
Static Drain-Source On-Resistance
ID(on)
On-State Drain Current
gFS
Forward Transconductance
VDS = VGS, VDS = VGS,
ID = 250 µA ID = -250 µA
ID = 250 µA, Referenced to 25°C
ID = -250 µA, Referenced to 25°C
VGS = 10 V,
ID = 7 A
VGS = 10 V, ID = 7 A, TJ = 125°C
VGS = 4.5 V,
ID = 6 A
VGS = -10 V,
ID = -5 A
VGS = -10 V, ID = -5 A, TJ = 125°C
VGS = -4.5 V, ID = -4 A
VGS = 10 V,
VDS = 5 V
VGS = -10 V,
VDS = -5 V
VDS = 5 V,
ID = 7 A
VDS = -5 V,
ID =-5 A
Q1 1 1.9 3
V
Q2 -1 -1.7 -3
Q1
-4.5
mV/°C
Q2
4.5
Q1
19 28 mΩ
27 42
24 40
Q2
42 52
57 78
65 80
Q1 20
A
Q2 -20
Q1
25
S
Q2
10
Dynamic Characteristics
Ciss
Input Capacitance
Q1
Q1
575
pF
VDS = 15 V, VGS = 0 V, f = 1.0 MHz
Q2
528
Coss
Output Capacitance
Q1
145
pF
Q2
Q2
132
Crss
Reverse Transfer Capacitance VDS = -15 V, VGS = 0 V, f = 1.0 MHz Q1
65
pF
Q2
70
RG
Gate Resistance
VGS = 15 mV, f = 1.0 MHz
Q1
2.1
Ω
Q2
6.0
FDS8958A Rev F3 (W)
FDS8958A
Electrical Characteristics (continued)
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Switching Characteristics (Note 2)
td(on)
Turn-On Delay Time
Q1
Q1
VDD = 15 V, ID = 1 A,
Q2
tr
Turn-On Rise Time
VGS = 10V, RGEN = 6 Ω
Q1
Q2
td(off)
Turn-Off Delay Time
Q2
Q1
VDD = -15 V, ID = -1 A,
Q2
tf
Turn-Off Fall Time
VGS = -10V, RGEN = 6 Ω
Q1
Q2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
Q1
Q1
VDS = 15 V, ID = 7 A, VGS = 10 V
Q2
Q1
Q2
Q2
VDS = -15 V, ID = -5 A,VGS = -10 V
Q1
Q2
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
Q1
Q2
ISM
Maximum Plused Drain-Source Diode Forward Current (Note 2) Q1
Q2
VSD
Drain-Source Diode Forward VGS = 0 V, IS = 1.3 A
(Note 2) Q1
Voltage
VGS = 0 V, IS = -1.3 A
(Note 2) Q2
trr
Diode Reverse Recovery Q1
Q1
Time
IF = 7 A, diF/dt = 100 A/µs
Q2
Qrr
Diode Reverse Recovery Q2
Q1
Charge
IF = -5 A, diF/dt = 100 A/µs
Q2
8
16 ns
7
14
5
10 ns
13 24
23 37 ns
14 25
3
6
ns
9
17
11.4 16 nC
9.6 13
1.7
nC
2.2
2.1
nC
1.7
1.3
A
-1.3
20
A
-20
0.75 1.2
V
-0.88 -1.2
19
nS
19
9
nC
6
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while.