EPA018BV

Excelics DATA SHEET EPA018BV High Efficiency Heterojunction Power FET VERY HIGH fmax: 120GHz +20.0dBm TYPICAL OUTPUT POWER 13.0dB TYPICAL POWER GAIN AT 18 GHz TYPICAL 0.75dB NOISE FIGURE AND 12.5dB ASSOCIATED GAIN AT 12GHz 0.3 X 180 MICRON RECESSED “MUSHROOM” GATE Si3N4 PASSIVATION AND VIA HOLE GROUNDING ADVANCED EPITAXIAL HETEROJUNCTION PROFILE PROVIDES EXTRA HIGH POWER EFFICIENCY, AND HIGH RELIABILITY Idss SORTED IN 5 mA PER BIN RANGE : Via Hole Chip Thickness: 75 ± 13 microns All Dimensions In Microns ELECTRICAL CHARACTERISTICS (Ta = 25 OC) SYMBOLS P1dB G1dB PAE NF Ga Idss Gm Vp BVgd BVgs Rth PARAMETERS/TEST CONDITIONS Output Power at 1dB Compression f=12GHz Vds=6V, Ids=50% Idss f=18GHz Gain at 1dB Compression f=12GHz Vds=6V, Ids=50% Idss f=18GHz Power Added Efficiency at 1dB Compression Vds=6V, Ids=50% Idss f=12Ghz Noise Figure f=12GHz Vds=2V, Ids=15mA Associated Gain f=12GHz Vds=2V, Ids=15mA Saturated Drain Current Transconductance Pinch-off Voltage Drain Breakdown Voltage Source Breakdown Voltage Vds=3V, Vgs=0V Vds=3V, Vgs=0V Vds=3V, Ids=1.0mA Igd=0.5mA Igs=0.5mA -9 -7 MIN 18.0 13.0 TYP 20.0* 20.0* 14.5 13.0 48 0.75 12.5 30 35 55 60 -1.0 -15 -14 140 o MAX UNIT dBm dB % dB dB 80 mA mS -2.5 V V V C/W Thermal Resistance (Au-Sn Eutectic Attach) * P1dB = 21.5dBm can be obtained with 8v/50% Idss bias. Consult factory for wafer selection. MAXIMUM RATINGS AT 25OC SYMBOLS Vds Vgs Ids Igsf Pin Tch Tstg Pt PARAMETERS Drain-Source Voltage Gate-Source Vo...