DS8835

DS7833 DS8833 DS7835 DS8835 Quad TRI-STATE Bus Transceivers February 1996 DS7833 DS8833 DS7835 DS8835 Quad TRI-STATE Bus Transceivers General Description This family of TRI-STATE bus transceivers offers extreme versatility in bus organized data transmission systems The data bus may be unterminated or terminated DC or AC at one or both ends Drivers in the third (high impedance) state load the data bus with a negligible leakage current The receiver input current is low allowing at least 100 driver receiver pairs to utilize a single bus The bus loading is unchanged when VCC e 0V The receiver incorporates hysteresis to provide greater noise immunity All devices utilize a high current TRI-STATE output driver The DS7833 DS8833 and DS7835 DS8835 employ TRI-STATE outputs on the receiver also The DS7833 DS8833 are non-inverting quad transceivers with a common inverter driver disable control and common inverter receiver disable control The DS7835 DS8835 are inverting quad transceivers with a common inverter driver disable control and a common inverter receiver disable control Features Y Y Y Y Receiver hysteresis Receiver noise immunity Bus terminal current for normal VCC or VCC e 0V Receivers Sink Source Drivers Sink 400 mV typ 1 4V typ 80 mA max 16 mA at 0 4V max 2 0 mA (Mil) at 2 4V min 5 2 mA (Com) at 2 4V min Y Y Y Y Y 50 mA at 0 5V max 32 mA at 0 4V max Source 10 4 mA (Com) at 2 4V min 5 2 mA (Mil) at 2 4V min Drivers have TRI-STATE outputs DS7833 DS8833 DS7835 DS8835 r...