LVDS Transmitter. DS90C383 Datasheet

DS90C383 Transmitter. Datasheet pdf. Equivalent

DS90C383 Datasheet
Recommendation DS90C383 Datasheet
Part DS90C383
Description +3.3V Programmable LVDS Transmitter
Feature DS90C383; DS90C383/DS90CF384 +3.3V Programmable LVDS 24-Bit-Color Flat Panel Display (FPD) Link—65 MHz Novemb.
Manufacture National Semiconductor
Datasheet
Download DS90C383 Datasheet




National Semiconductor DS90C383
November 2000
DS90C383/DS90CF384
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel
Display (FPD) Link—65 MHz, +3.3V LVDS Receiver
24-Bit Flat Panel Display (FPD) Link—65 MHz
General Description
The DS90C383 transmitter converts 28 bits of LVCMOS/
LVTTL data into four LVDS (Low Voltage Differential Signal-
ing) data streams. A phase-locked transmit clock is transmit-
ted in parallel with the data streams over a fifth LVDS link.
Every cycle of the transmit clock 28 bits of input data are
sampled and transmitted. The DS90CF384 receiver con-
verts the LVDS data streams back into 28 bits of LVCMOS/
LVTTL data. At a transmit clock frequency of 65 MHz, 24 bits
of RGB data and 3 bits of LCD timing and control data
(FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455
Mbps per LVDS data channel. Using a 65 MHz clock, the
data throughputs is 227 Mbytes/sec. The transmitter is of-
fered with programmable edge data strobes for convenient
interface with a variety of graphics controllers. The transmit-
ter can be programmed for Rising edge strobe or Falling
edge strobe through a dedicated pin. A Rising edge trans-
mitter will inter-operate with a Falling edge receiver
(DS90CF384) without any translation logic. Both devices are
also offered in a 64 ball, 0.8mm fine pitch ball grid array
(FBGA) package which provides a 44 % reduction in PCB
footprint compared to the TSSOP package.
This chipset is an ideal means to solve EMI and cable size
problems associated with wide, high speed TTL interfaces.
Features
n 20 to 65 MHz shift clock support
n Programmable transmitter (DS90C383) strobe select
(Rising or Falling edge strobe)
n Single 3.3V supply
n Chipset (Tx + Rx) power consumption < 250 mW (typ)
n Power-down mode (< 0.5 mW total)
n Single pixel per clock XGA (1024x768) ready
n Supports VGA, SVGA, XGA and higher addressability.
n Up to 227 Megabytes/sec bandwidth
n Up to 1.8 Gbps throughput
n Narrow bus reduces cable size and cost
n 290 mV swing LVDS devices for low EMI
n PLL requires no external components
n Low profile 56-lead TSSOP package.
n Also available in a 64 ball, 0.8mm fine pitch ball grid
array (FBGA) package
n Falling edge data strobe Receiver
n Compatible with TIA/EIA-644 LVDS standard
n ESD rating >7 kV
n Operating Temperature: −40˚C to +85˚C
Block Diagrams
Typical Application
DS012887-2
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2000 National Semiconductor Corporation DS012887
www.national.com



National Semiconductor DS90C383
Block Diagrams (Continued)
DS90C383
Order Number DS90C383MTD or DS90C383SLC
See NS Package Number MTD56 or SLC64A
DS90CF384
DS012887-1
DS012887-24
Order Number DS90CF384MTD or DS90CF384SLC
See NS Package Number MTD56 or SLC64A
www.national.com
2



National Semiconductor DS90C383
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
CMOS/TTL Input Voltage
CMOS/TTL Output Voltage
LVDS Receiver Input Voltage
LVDS Driver Output Voltage
LVDS Output Short Circuit
Duration
−0.3V to +4V
−0.3V to (VCC + 0.3V)
−0.3V to (VCC + 0.3V)
−0.3V to (VCC + 0.3V)
−0.3V to (VCC + 0.3V)
Continuous
Junction Temperature
+150˚C
Storage Temperature
−65˚C to +150˚C
Lead Temperature
(Soldering, 4 sec for TSSOP)
+260˚C
Solder Reflow Temperature
(20 sec for FBGA)
+220˚C
Maximum Package Power Dissipation Capacity 25˚C
MTD56 (TSSOP) Package:
DS90C383MTD
1.63 W
DS90CF384MTD
1.61 W
Package Derating:
DS90C383MTD
12.5 mW/˚C above +25˚C
DS90CF384MTD
12.4 mW/˚C above +25˚C
Maximum Package Power Dissipation Capacity 25˚C
SLC64A Package:
DS90C383SLC
2.0 W
DS90CF384SLC
2.0 W
Package Derating:
DS90C383SLC
10.2 mW/˚C above +25˚C
DS90CF384SLC
10.2 mW/˚C above +25˚C
ESD Rating
(HBM, 1.5 k, 100 pF)
Recommended Operating
Conditions
Min Nom Max
Supply Voltage (VCC)
Operating Free Air
3.0 3.3 3.6
Temperature (TA)
Receiver Input Range
−40 +25 +85
0 2.4
Supply Noise Voltage (VCC)
100
> 7 kV
Units
V
˚C
V
mVPP
Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
LVCMOS/LVTTL DC SPECIFICATIONS
VIH High Level Input Voltage
VIL Low Level Input Voltage
VOH High Level Output Voltage
VOL Low Level Output Voltage
VCL Input Clamp Voltage
IIN Input Current
IOS Output Short Circuit Current
LVDS DC SPECIFICATIONS
IOH = −0.4 mA
IOL = 2 mA
ICL = −18 mA
VIN = VCC, GND, 2.5V or 0.4V
VOUT = 0V
VOD
VOD
Differential Output Voltage
Change in VOD between
complimentary output states
RL = 100
VOS
VOS
Offset Voltage (Note 4)
Change in VOS between
complimentary output states
IOS Output Short Circuit Current
IOZ Output TRI-STATE® Current
VTH Differential Input High Threshold
VTL Differential Input Low Threshold
IIN Input Current
TRANSMITTER SUPPLY CURRENT
VOUT = 0V, RL = 100
Power Down = 0V,
VOUT = 0V or VCC
VCM = +1.2V
VIN = +2.4V, VCC = 3.6V
VIN = 0V, VCC = 3.6V
ICCTW Transmitter Supply Current
Worst Case
RL = 100,
CL = 5 pF,
Worst Case Pattern
f = 32.5 MHz
f = 37.5 MHz
Min
2.0
GND
2.7
250
1.125
−100
Typ Max
3.3
0.06
−0.79
±5.1
−60
VCC
0.8
0.3
−1.5
±10
−120
345 450
35
1.25 1.375
35
−3.5 −5
±1 ±10
+100
±10
±10
31 45
32 50
Units
V
V
V
V
V
µA
mA
mV
mV
V
mV
mA
µA
mV
mV
µA
µA
mA
mA
3 www.national.com







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)