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DS90LV048A

National Semiconductor

3V LVDS Quad CMOS Differential Line Receiver

DS90LV048A 3V LVDS Quad CMOS Differential Line Receiver July 1999 DS90LV048A 3V LVDS Quad CMOS Differential Line Recei...


National Semiconductor

DS90LV048A

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Description
DS90LV048A 3V LVDS Quad CMOS Differential Line Receiver July 1999 DS90LV048A 3V LVDS Quad CMOS Differential Line Receiver General Description The DS90LV048A is a quad CMOS flow-through differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The DS90LV048A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a TRI-STATE ® function that may be used to multiplex outputs. The receiver also supports open, shorted and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV048A has a flow-through pinout for easy PCB layout. The EN and EN* inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four receivers. The DS90LV048A and companion LVDS line driver (eg. DS90LV047A) provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications. Features n n n n n n n n n n n n n n > 400 Mbps (200 MHz) switching rates Flow-through pinout simplifies PCB layout 150 ps channel-to-channel skew (typical) 100 ps differential skew (typical) 2.7 ns maximum propagation delay 3.3V power supply design High impedance LVDS inputs on power down Low Power design (40mW 3.3V static) Interoperable with ex...




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