FQD3P50 / FQU3P50
FQD3P50 / FQU3P50
500V P-Channel MOSFET
January 2009
QFET®
General Description
These P-Channel enha...
FQD3P50 / FQU3P50
FQD3P50 / FQU3P50
500V P-Channel MOSFET
January 2009
QFET®
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ballast based on complimentary half bridge.
D
GS
D-PAK
FQD Series
GDS
Features
-2.1A, -500V, RDS(on) = 4.9Ω @VGS = -10 V Low gate charge ( typical 18 nC) Low Crss ( typical 9.5 pF) Fast switching 100% avalanche tested Improved dv/dt capability RoHS Compliant
I-PAK
FQU Series
G!
S
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● ●
▶▲
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D
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol VDSS ID
IDM VGSS EAS IAR EAR dv/dt PD
TJ, TSTG TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C) - Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * Power Dissipation (TC = 25°C)
- Derate above 25°C
(Note 3)
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC RθJA RθJA
Parameter Thermal Resista...