DM74ALS253 Selector/Multiplexer Datasheet

DM74ALS253 Datasheet, PDF, Equivalent


Part Number

DM74ALS253

Description

3-STATE Dual 1-of-4 Line Data Selector/Multiplexer

Manufacture

Fairchild Semiconductor

Total Page 5 Pages
Datasheet
Download DM74ALS253 Datasheet


DM74ALS253
April 1984
Revised February 2000
DM74ALS253
3-STATE Dual 1-of-4 Line Data Selector/Multiplexer
General Description
This Data Selector/Multiplexer contains full on-chip decod-
ing to select one-of-four data sources as a result of a
unique two-bit binary code at the Select Inputs. Each of the
two Data Selector/Multiplexer circuits have their own sepa-
rate Data and Output Control inputs and a non-inverting 3-
STATE output buffer. The Output Control inputs, when at
the high level, place the corresponding output in the high
impedance OFF-State. In order to prevent bus access con-
flicts, output disable times are shorter than output enable
times. The Select input buffers incorporate internal overlap
features to ensure that select input changes do not cause
invalid output transients.
Features
s Advanced oxide-isolated, ion-implanted Schottky TTL
process
s Switching performance is guaranteed over full tempera-
ture and VCC supply range
s Pin and functional compatible with LS family counterpart
s Improved output transient handling capability
s Output control circuitry incorporates power-up 3-STATE
feature
Ordering Code:
Order Number Package Number
Package Description
DM74ALS253M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74ALS253N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Select
Data Inputs
Output
Inputs
Control
B A C0 C1 C2 C3
G
XX X X X X
H
LL L X X X
L
LL H X X X
L
LH X L X X
L
LH X H X X
L
HL X X L X
L
HL X X H X
L
HH X X X L
L
HH X X X H
L
Address inputs A and B are common to both sections
H = HIGH Level
L = LOW Level
X = Don't Care
Z = High Impedance
Output
Y
Z
L
H
L
H
L
H
L
H
© 2000 Fairchild Semiconductor Corporation DS006215
www.fairchildsemi.com

DM74ALS253
Logic Diagram
www.fairchildsemi.com
2


Features DM74ALS253 3-STATE Dual 1-of-4 Line Data Selector/Multiplexer April 1984 Revis ed February 2000 DM74ALS253 3-STATE Du al 1-of-4 Line Data Selector/Multiplexe r General Description This Data Selecto r/Multiplexer contains full on-chip dec oding to select one-of-four data source s as a result of a unique two-bit binar y code at the Select Inputs. Each of th e two Data Selector/Multiplexer circuit s have their own separate Data and Outp ut Control inputs and a non-inverting 3 STATE output buffer. The Output Control inputs, when at the high level, place the corresponding output in the high im pedance OFF-State. In order to prevent bus access conflicts, output disable ti mes are shorter than output enable time s. The Select input buffers incorporate internal overlap features to ensure th at select input changes do not cause in valid output transients. Features s Ad vanced oxide-isolated, ion-implanted Sc hottky TTL process s Switching performa nce is guaranteed over full temperature and VCC supply range s .
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