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HY29LV160BF-80I Dataheets PDF



Part Number HY29LV160BF-80I
Manufacturers Hynix Semiconductor
Logo Hynix Semiconductor
Description 16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory
Datasheet HY29LV160BF-80I DatasheetHY29LV160BF-80I Datasheet (PDF)

HY29LV160 16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory KEY FEATURES n Single Power Supply Operation – Read, program and erase operations from 2.7 to 3.6 volts – Ideal for battery-powered applications High Performance – 70, 80, 90 and 120 ns access time versions Ultra-low Power Consumption (Typical Values At 5 Mhz) – Automatic sleep mode current: 1 µA – Standby mode current: 1 µA – Read current: 9 mA – Program/erase current: 20 mA Flexible Sector Architecture: – One 16 KB, two 8 KB, one 32 .

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HY29LV160 16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory KEY FEATURES n Single Power Supply Operation – Read, program and erase operations from 2.7 to 3.6 volts – Ideal for battery-powered applications High Performance – 70, 80, 90 and 120 ns access time versions Ultra-low Power Consumption (Typical Values At 5 Mhz) – Automatic sleep mode current: 1 µA – Standby mode current: 1 µA – Read current: 9 mA – Program/erase current: 20 mA Flexible Sector Architecture: – One 16 KB, two 8 KB, one 32 KB and thirty-one 64 KB sectors in byte mode – One 8 KW, two 4 KW, one 16 KW and thirty-one 32 KW sectors in word mode – Top or bottom boot block configurations available Sector Protection – Allows locking of a sector or sectors to prevent program or erase operations within that sector – Sectors lockable in-system or via programming equipment – Temporary Sector Unprotect allows changes in locked sectors (requires high voltage on RESET# pin) Fast Program and Erase Times – Sector erase time: 0.25 sec typical for each sector – Chip erase time: 8 sec typical – Byte program time: 9 µs typical Unlock Bypass Program Command – Reduces programming time when issuing multiple program command sequences Automatic Erase Algorithm Preprograms and Erases Any Combination of Sectors or the Entire Chip Erase Suspend/Erase Resume – Suspends an erase operation to allow reading data from, or programming data to, a sector that is not being erased – Erase Resume can then be invoked to complete suspended erasure Automatic Program Algorithm Writes and Verifies Data at Specified Addresses n 100,000 Write Cycles per Sector Minimum n Data# Polling and Toggle Bits – Provide software confirmation of completion of program and erase operations Ready/Busy# Pin – Provides hardware confirmation of completion of program and erase operations Hardware Reset Pin (RESET#) Resets the Device to Reading Array Data Compliant With Common Flash Memory Interface (CFI) Specification – Flash device parameters stored directly on the device – Allows software driver to identify and use a variety of different current and future Flash products Compatible With JEDEC standards – Pinout and software compatible with single-power supply Flash devices – Superior inadvertent write protection Space Efficient Packaging – 48-pin TSOP and 48-ball FBGA packages n n n n n n n n n n LOGIC DIAGRAM 20 A[19:0] DQ[7:0] 7 CE# OE# WE# RESET# BYTE# DQ[14:8] DQ15/A-1 RY/BY# 8 n n n n Preliminary Revision 1.2, May 2001 HY29LV160 GENERAL DESCRIPTION The HY29LV160 is a 16 Mbit, 3 volt-only, CMOS Flash memory organized as 2,097,152 (2M) bytes or 1,048,576 (1M) words that is available in 48pin TSOP and 48-ball FBGA packages. Wordwide data (x16) appears on DQ[15:0] and bytewide (x8) data appears on DQ[7:0]. The HY29LV160 can be programmed and erased in-system with a single 3 volt VCC supply. Internally generated and regulated voltages are provided for program and erase operations, so that the device does not require a higher voltage VPP power supply to perform those functions. The device can also be programmed in standard EPROM programmers. Access times as low as 80 ns over the full operating voltage range of 2.7 - 3.6 volts, and 70 ns with a limited voltage range of 3.0 - 3.6 volts, are offered for timing compatibility with the zero wait state requirements of high speed microprocessors. To eliminate bus contention, the HY29LV160 has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The device is compatible with the JEDEC singlepower-supply Flash memory command set standard. Commands are written to the command register using standard microprocessor write timings. They are then routed to an internal state-machine that controls the erase and programming circuits. Device programming is performed a byte/word at a time by executing the four-cycle Program Command write sequence. This initiates an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. Faster programming times can be achieved by placing the HY29LV160 in the Unlock Bypass mode, which requires only two write cycles to program data instead of four. The HY29LV160’s sector erase architecture allows any number of array sectors to be erased and reprogrammed without affecting the data contents of other sectors. Device erasure is initiated by executing the Erase Command sequence. This initiates an internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation. As during programming cycles, the device automatically times the erase pulse widths and verifies proper cell margin. Hardware Sector Protection optionally disables both program and erase operations in any combination of the sectors of 2 the memory array, while Temporary Sector Unprotect allows in-system erasure and code changes in previously protected sectors. Erase Suspend enables the user to put erase on hold for any period of time .


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