HY628100B

HY628100B Series 128Kx8bit CMOS SRAM Document Title 128K x8 bit 5.0V Low Power CMOS slow SRAM Revision History Revision No 10 11 History Initial Revision History Insert Marking Information Add Revised - E.T (-25~85°C), I.T (-40~85°C) Part Insert - AC Test Condition Add : 5pF Test Load Changed Logo - HYUNDAI -> hynix - Marking Information Change Draft Date Jul.14.2000 Dec.04.2000 Remark Final Final 12 Apr.30.2001 Final This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 12 / Apr.2001 Hynix Semiconductor HY628100B Series DESCRIPTION The HY628100B is a high speed, low power and 1M bit CMOS Static Random Access Memory organized as 131,072 words by 8bit. The HY628100B uses high performance CMOS process technology and designed for high speed low power circuit technology. It is particulary well suited for used in high density low power system application. This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 2.0V. FEATURES Fully static operation and Tri-state output TTL compatible inputs and outputs Battery backup(L/LL-part) -. 2.0V(min) data retention Standard pin configuration -. 32pin SOP - 525mil -. 32pin TSOPI - 8X20(Standard) Product Voltage Speed Operation No (V) (ns) Current/Icc(mA) HY628100B 4.5~5.5 50*/55/70/85 10 HY628100B-E 4.5~5.5 50*/55/70/8...