DTC114TE

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by DTC114TE/D Preliminary Data Sheet Bias Resistor Transistor DTC114TE 3 2 1 NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. The DTC114TE is housed in the SOT–416/SC–90 package which is ideal for low power surface mount applications where board space is at a premium. Simplifies Circuit Design Reduces Board Space Reduces Component Count Available in 8 mm, 7 inch/3000 Unit Tape and Reel. IN (1) R1 CASE 463–01, STYLE 1 SOT–416/SC–90 OUT (3) R1 = 10 kΩ GND (2) MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Rating Collector–Base Voltage Collector–Emitter Voltage Collector Current Symbol VCBO VCEO IC Value 50 50 100 Unit Vdc Vdc mAdc DEVICE MARKING DTC114TE = 94 THERMAL CHARACTERISTICS Power Dissipation @ TA = 25°C(1) Operating and Storage Temperature Range Junction Temperature PD TJ, Tstg TJ *125 – 55 to +150 150 mW °C °C ELECTRICAL CHARACTERISTICS (TA = 25°C) Characteristic Collector–Base Breakdown Voltage (IC = 50 µAdc) Collector–Emitter Breakdown Voltage (IC = 1.0 mAdc) Emitter–Base Breakdown Voltage (IE ...