3-STATE Outputs. 74ACT16540 Datasheet

74ACT16540 Outputs. Datasheet pdf. Equivalent

74ACT16540 Datasheet
Recommendation 74ACT16540 Datasheet
Part 74ACT16540
Description 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs
Feature 74ACT16540; 74ACT16540 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs August 1999 Revised October 199.
Manufacture Fairchild Semiconductor
Datasheet
Download 74ACT16540 Datasheet




Fairchild Semiconductor 74ACT16540
August 1999
Revised October 1999
74ACT16540
16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs
General Description
The ACT16540 contains sixteen inverting buffers with 3-
STATE outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver. The device is byte controlled. Each byte has sep-
arate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
Features
s Separate control logic for each byte
s Outputs source/sink 24 mA
s TTL-compatible inputs
Ordering Code:
Order Number
74ACT16540SSC
74ACT16540MTD
Package Number
Package Description
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OEn
I0–I15
O0–O15
Description
Output Enable Input (Active LOW)
Inputs
Outputs
FACTis a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS500299
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Fairchild Semiconductor 74ACT16540
Functional Description
The ACT16540 contains sixteen inverting buffers with 3-
STATE standard outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. The control pins may be shorted together to obtain
full 16-bit operation. The 3-STATE outputs are controlled by
an Output Enable (OEn) input for each byte. When OEn is
LOW, the outputs are in 2-state mode. When OEn is HIGH,
the outputs are in the high impedance mode, but this does
not interfere with entering new data into the inputs.
Truth Tables
Inputs
OE1
L
H
X
OE2
L
X
H
LL
Inputs
OE3
L
OE4
L
HX
XH
LL
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
I0–I7
H
X
X
L
I8–I15
H
X
X
L
Outputs
O0–O7
L
Z
Z
H
Outputs
O8–O15
L
Z
Z
H
Logic Diagram
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Fairchild Semiconductor 74ACT16540
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC + 0.5V
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source/Sink Current (IO)
DC VCC or Ground Current
per Output Pin
Storage Temperature
0.5V to +7.0V
20 mA
+20 mA
20 mA
+20 mA
0.5V to VCC + 0.5V
± 50 mA
± 50 mA
65°C to +150°C
Recommended Operating
Conditions
Supply Voltage (VCC)
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
Minimum Input Edge Rate (V/t)
4.5V to 5.5V
0V to VCC
0V to VCC
40°C to +85°C
125 mV/ns
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACTcircuits outside databook specifications.
DC Electrical Characteristics
Symbol
Parameter
VIH Minimum HIGH
Input Voltage
VIL Maximum LOW
Input Voltage
VOH Minimum HIGH
Output Voltage
VCC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
TA = +25°C
TA = −40°C to +85°C
Typ Guaranteed Limits
1.5 2.0
2.0
1.5 2.0
2.0
1.5 0.8
0.8
1.5 0.8
0.8
4.49
4.4
4.4
5.49
5.4
5.4
VOL Maximum LOW
Output Voltage
4.5 3.86
5.5 4.86
4.5 0.001 0.1
5.5 0.001 0.1
3.76
4.76
0.1
0.1
4.5
5.5
IOZ Maximum 3-STATE
Leakage Current
5.5
IIN Maximum Input
Leakage Current
5.5
ICCT
Maximum ICC/Input
5.5 0.6
ICC
Max Quiescent Supply Current
5.5
IOLD
IOHD
Minimum Dynamic
Output Current (Note 3)
5.5
Note 2: All outputs loaded; thresholds associated with output under test.
Note 3: Maximum test duration 2.0 ms; one output loaded at a time.
0.36
0.36
± 0.5
± 0.1
8.0
0.44
0.44
± 5.0
± 1.0
1.5
80.0
75
75
Units
Conditions
V VOUT = 0.1V
or VCC 0.1V
V VOUT = 0.1V
or VCC 0.1V
V IOUT = −50 µA
VIN = VIL or VIH
V IOH = −24 mA
IOH = −24 mA (Note 2)
V IOUT = 50 µA
VIN = VIL or VIH
V IOL = 24 mA
IOL = 24 mA (Note 2)
µA VI = VIL, VIH
VO = VCC, GND
µA VI = VCC, GND
mA VI = VCC 2.1V
µA VIN = VCC or GND
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
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