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74ACT521 Dataheets PDF



Part Number 74ACT521
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description 8-Bit Identity Comparator
Datasheet 74ACT521 Datasheet74ACT521 Datasheet (PDF)

74AC521 • 74ACT521 8-Bit Identity Comparator November 1988 Revised November 1999 74AC521 • 74ACT521 8-Bit Identity Comparator General Description The AC/ACT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input. Features s ICC reduced by 50% s Compares two 8-bit words in 6.5 ns typ s Expandable to any word length s 20-pin package s.

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74AC521 • 74ACT521 8-Bit Identity Comparator November 1988 Revised November 1999 74AC521 • 74ACT521 8-Bit Identity Comparator General Description The AC/ACT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input. Features s ICC reduced by 50% s Compares two 8-bit words in 6.5 ns typ s Expandable to any word length s 20-pin package s Outputs source/sink 24 mA s ACT521 has TTL-compatible inputs Ordering Code: Order Number 74AC521SC 74AC521SJ 74AC521PC 74ACT521SC 74ACT521SJ 74ACT521PC Package Number M20B M20D N20A M20B M20D N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering table. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names A0–A7 B0–B7 TA = B OA = B FACT is a trademark of Fairchild Semiconductor Corporation. Description Word A Inputs Word B Inputs Expansion or Enable Input Identity Output © 1999 Fairchild Semiconductor Corporation DS009964 www.fairchildsemi.com 74AC521 • 74ACT521 Truth Table Inputs IA = B L L H H H = HIGH Voltage Level L = LOW Voltage Level Note 1: A0 = B0, A1 = B1, A2 = B2, etc. Logic Diagram Outputs A, B A = B (Note 1) A≠Β A = B (Note 1) A≠Β OA = B L H H H Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Applications Ripple Expansion Parallel Expansion www.fairchildsemi.com 2 74AC521 • 74ACT521 Absolute Maximum Ratings(Note 2) Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) PDIP 140°C ±50 mA −65°C to +150 °C ±50 mA −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V −0.5V to +7.0V Recommended Operating Conditions Supply Voltage (VCC) AC ACT Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (∆V/∆t) AC Devices VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate (∆V/∆t) ACT Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V 125 mV/ns Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that .


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