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NAND gate. 74AHC30 Datasheet |
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INTEGRATED CIRCUITS
DATA SHEET
74AHC30; 74AHCT30
8-input NAND gate
Product specification
File under Integrated Circuits, IC06
1999 Nov 30
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Philips Semiconductors
8-input NAND gate
Product specification
74AHC30; 74AHCT30
FEATURES
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 1000 V
• Balanced propagation delays
• Inputs accept voltages higher than VCC
• For AHC only: operates with CMOS input levels
• For AHCT only: operates with TTL input levels
• Output capability: standard
• ICC category: SSI
• Specified from −40 to +85 °C and −40 to +125 °C.
DESCRIPTION
The 74AHC/AHCT30 are high-speed Si-gate CMOS
devices and are pin compatible with Low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
The 74AHC/AHCT30 provide the 8-input NAND function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
CI
CO
CPD
propagation delay
A, B, C, D, E, F, G, H to Y
input capacitance
output capacitance
power dissipation capacitance
CL = 15 pF; VCC = 5 V
CL = 50 pF; f = 1 MHz;
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
∑ (CL × VCC2 × fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
TYPICAL
AHC
3.6
AHCT
3.3
3.0 3.0
4.0 4.0
10 12
UNIT
ns
pF
pF
pF
1999 Nov 30
2
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Philips Semiconductors
8-input NAND gate
Product specification
74AHC30; 74AHCT30
FUNCTION TABLE
See note 1.
INPUTS
ABCDE FGH
LXXXXXXX
XLXXXXXX
XXLXXXXX
XXXLXXXX
XXXXLXXX
XXXXXLXX
XXXXXXLX
XXXXXXXL
HHHHHHΗH
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
ORDERING INFORMATION
TYPE NUMBER
74AHC30D
74AHCT30D
74AHC30PW
74AHCT30PW
TEMPERATURE
RANGE
−40 to +125 °C
PINS
14
14
14
14
PACKAGES
PACKAGE
SO
SO
TSSOP
TSSOP
MATERIAL
plastic
plastic
plastic
plastic
PINNING
PIN
1
2
3
4
5
6
7
8
9, 10 and 13
11
12
14
1999 Nov 30
SYMBOL
A
B
C
D
E
F
GND
Y
n.c.
G
H
VCC
data input
data input
data input
data input
data input
data input
ground (0 V)
data output
not connected
data input
data input
DC supply voltage
3
DESCRIPTION
OUTPUTS
Y
H
H
H
H
H
H
H
H
L
CODE
SOT108-1
SOT108-1
SOT402-1
SOT402-1
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