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74ALS164

NXP

8-bit serial-in parallel-out shift register

INTEGRATED CIRCUITS 74ALS164 8–bit serial–in parallel–out shift register Product specification IC05 Data Handbook 1991 ...


NXP

74ALS164

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INTEGRATED CIRCUITS 74ALS164 8–bit serial–in parallel–out shift register Product specification IC05 Data Handbook 1991 Feb 08 Philips Semiconductors Philips Semiconductors Product specification 8-bit serial-in parallel-out shift register 74ALS164 FEATURES Gated serial data inputs Typical shift frequency of 75MHz Asynchronous master reset Buffered clock and data inputs Fully synchronous data transfer DESCRIPTION The 74ALS164 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (Dsa, Dsb); either input can be used as an active-high enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied High. Data shifts one place to the right on each Low-to-high transition of the clock (CP) input, and enters into Q0 the logical AND of the two data inputs (Dsa, Dsb) that existed one setup time before the rising edge. A Low level on the Master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all outputs Low. PIN CONFIGURATION Dsa Dsb Q0 Q1 Q2 Q3 GND 1 2 3 4 5 6 7 14 VCC 13 Q7 12 Q6 11 Q5 10 Q4 9 8 MR CP SF00717 TYPE 74ALS164 TYPICAL fMAX 75MHz TYPICAL SUPPLY CURRENT (TOTAL) 10mA ORDERING INFORMATION ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C 74ALS164N 74ALS164D DRAWING NUMBER SOT27-1 SOT108-1 14-pin plastic DIP 14-pin plastic SO ...




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