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74ALS374

NXP

Latch/flip-flop

INTEGRATED CIRCUITS 74ALS373/74ALS374 Latch/flip–flop Product specification IC05 Data Handbook 1991 Feb 08 Philips Sem...


NXP

74ALS374

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Description
INTEGRATED CIRCUITS 74ALS373/74ALS374 Latch/flip–flop Product specification IC05 Data Handbook 1991 Feb 08 Philips Semiconductors Philips Semiconductors Product specification Latch/flip-flop 74ALS373 Octal transparent latch (3-State) 74ALS374 Octal D flip-flop (3-State) FEATURES 74ALS373/74ALS374 8-bit transparent latch – 74ALS373 8-bit positive edge triggered register – 74ALS374 3-State output buffers Common 3-State output register Independent register and 3-State buffer operation TYPE 74ALS373 TYPICAL PROPAGATION DELAY 6.0ns TYPICAL SUPPLY CURRENT (TOTAL) 14mA TYPICAL SUPPLY CURRENT (TOTAL) 17mA DESCRIPTION The 74ALS373 is an octal transparent latch coupled to eight 3-State output devices. The two sections of the device are controlled independently by enable (E) and output enable (OE) control gates. The data on the D inputs is transferred to the latch outputs when the enable (E) input is High. The latch remains transparent to the data input while E is High, and stores the data that is present one setup time before the High-to-Low enable transition. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low output enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, latched or transparent data appears at the output. When OE is High, the outputs are in High impedance “off” state, which means they will neither drive nor load the bus. The 74AL...




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