74ALS574A

INTEGRATED CIRCUITS 74ALS573B/74ALS574A Latch flip–flop Product specification IC05 Data Handbook 1991 Feb 08 Philips Semiconductors Philips Semiconductors Product specification Latch/flip-flop 74ALS573B 74ALS574A FEATURES 74ALS573B/74ALS574A Octal transparent latch (3-State) Octal D flip-flop (3-State) It is an 8-bit edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by clock (CP) and output enable (OE) control gates. The register is fully edge triggered. The state of the D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop’s Q output. The active-Low output enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, latched or transparent data appears at the output. When OE is High, the outputs are in high impedance “off” state, which means they will neither drive nor load the bus. TYPICAL PROPAGATION DELAY 5.0ns 6.0ns TYPICAL SUPPLY CURRENT (TOTAL) 12mA 15mA 74ALS573B is broadside pinout version of 74ALS373 74ALS574A is broadside pinout version of 74ALS374 Inputs and outputs on opposite side of package allow easy interface to microprocessors Useful as an input or output port for microprocessors 3-State outputs for bus interfacing Common output enable 74ALS563A and 74ALS564A are inverting version of 74ALS573B and 74ALS574A respectively DESCRIPTION The 74ALS573B is an octal transparent ...