74ALVC16334A

INTEGRATED CIRCUITS 74ALVC16334A 16-bit registered driver with inverted register enable (3-State) Product specification Replaces datasheet 74ALVC16334 of 2000 Jan 04 IC24 Data Handbook 2000 Mar 14 Philips Semiconductors Philips Semiconductors Product specification 16-bit registered driver with inverted register enable (3-State) 74ALVC16334A FEATURES Wide supply voltage range of 1.2 V to 3.6 V Complies with JEDEC standard no. 8-1A. CMOS low power consumption Direct interface with TTL levels Current drive ± 24 mA at 3.0 V MULTIBYTETM flow-through standard pin-out architecture Low inductance multiple VCC and GND pins for minimum noise and ground bounce PIN CONFIGURATION OE Y1 Y2 GND Y3 Y4 VCC Y5 Y6 GND Y7 Y8 Y9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 CP A1 A2 GND A3 A4 VCC A5 A6 GND A7 A8 A9 A10 GND A11 A12 VCC A13 A14 GND A15 A16 LE Output drive capability 50 Ω transmission lines @ 85°C Input diodes to accommodate strong drivers DESCRIPTION The 74ALVC16334A is a 16–bit universal bus driver. Data flow is controlled by active low output enable (OE), active low latch enable (LE) and clock inputs (CP). When LE is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop. When OE is LOW the outputs are active. When OE is HIGH, the ou...