Quad 2-Input AND Gate
74F08 Quad 2-Input AND Gate
April 1988 Revised September 2000
74F08 Quad 2-Input AND Gate
General Description
This dev...
Description
74F08 Quad 2-Input AND Gate
April 1988 Revised September 2000
74F08 Quad 2-Input AND Gate
General Description
This device contains four independent gates, each of which performs the logic AND function.
Ordering Code:
Order Number Package Number
Package Description
74F08SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F08SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F08PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Unit Loading/Fan Out
Pin Names An, Bn On
Description
Inputs Outputs
U.L. HIGH/LOW
1.0/1.0 50/33.3
Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA −1 mA/20 mA
© 2000 Fairchild Semiconductor Corporation DS009457
www.fairchildsemi.com
74F08
Absolute Maximum Ratings(Note 1)
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Junction Temperature under Bias
−55°C to +150°C
VCC Pin Potential to Ground Pin Input Voltage (Note 2)
−0.5V to +7.0V −0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V) Standard Output 3-STATE Output
−0.5V to VCC −0.5V to +5.5V
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
ESD Last Passing Voltage (Min)
4000V
Recommended Operating Conditions
Free Air Ambient ...
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