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74F109 Dataheets PDF



Part Number 74F109
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description Dual JK Positive Edge-Triggered Flip-Flop
Datasheet 74F109 Datasheet74F109 Datasheet (PDF)

74F109 Dual JK Positive Edge-Triggered Flip-Flop April 1988 Revised November 1999 74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-type flip-flop (refer to F74 data sheet) by connecting the J and K inputs. Asynchronous Inputs: LOW input to SD sets Q to HIGH leve.

  74F109   74F109


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