Serial-In/ Parallel-Out Shift Register
74F164A Serial-In, Parallel-Out Shift Register
October 1989 Revised August 1999
74F164A Serial-In, Parallel-Out Shift ...
Description
74F164A Serial-In, Parallel-Out Shift Register
October 1989 Revised August 1999
74F164A Serial-In, Parallel-Out Shift Register
General Description
The 74F164A is a high-speed 8-bit serial-in/parallel-out shift register. Serial data is entered through a 2-input AND gate synchronous with the LOW-to-HIGH transition of the clock. The device features an asynchronous Master Reset which clears the register, setting all outputs LOW independent of the clock. The 74F164A is a faster version of the 74F164.
Features
s Typical shift frequency of 90 MHz s Asynchronous Master Reset s Gated serial data input s Fully synchronous data transfers s 74F164A is a faster version of the 74F164
Ordering Code:
Order Number 74F164ASC 74F164ASJ 74F164APC Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation
DS010613
www.fairchildsemi.com
74F164A
Unit Loading/Fan Out
Pin Names A, B CP MR Q0–Q7 Data Inputs Clock Pulse Input (Active Rising Edge) Master Reset Input (Active LOW) Outputs Description U.L. HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 50/33.3 Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0...
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