74F174

74F174 Hex D-Type Flip-Flop with Master Reset April 1988 Revised July 1999 74F174 Hex D-Type Flip-Flop with Master Reset General Description The 74F174 is a high-speed hex D-type flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition. The device has a Master Reset to simultaneously clear all flipflops. Features s Edge-triggered D-type inputs s Buffered positive edge-triggered clock s Asynchronous common reset s Guaranteed 4000V minimum ESD protection Ordering Code: Order Number 74F174SC 74F174SJ 74F174PC Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 1999 Fairchild Semiconductor Corporation DS009489 www.fairchildsemi.com 74F174 Unit Loading/Fan Out Pin Names D0–D5 CP MR Q0–Q5 Data Inputs Clock Pulse Input (Active Rising Edge) Master Reset Input (Active LOW) Outputs Description U.L. HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 50/33.3 Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA −1 mA/20 mA Functional Description The 74F174 consists of six edge-triggered D-type flip-flop...