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IDT54FCT162827ET Dataheets PDF



Part Number IDT54FCT162827ET
Manufacturers Integrated Device Technology
Logo Integrated Device Technology
Description FAST CMOS 20-BIT BUFFERS
Datasheet IDT54FCT162827ET DatasheetIDT54FCT162827ET Datasheet (PDF)

FAST CMOS 20-BIT BUFFERS Integrated Device Technology, Inc. IDT54/74FCT16827AT/BT/CT/ET IDT54/74FCT162827AT/BT/CT/ET FEATURES: • Common features: – 0.5 MICRON CMOS Technology – High-speed, low-power CMOS replacement for ABT functions – Typical tSK(o) (Output Skew) < 250ps – Low input and output leakage ≤1µ A (max.) – ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) – Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil.

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FAST CMOS 20-BIT BUFFERS Integrated Device Technology, Inc. IDT54/74FCT16827AT/BT/CT/ET IDT54/74FCT162827AT/BT/CT/ET FEATURES: • Common features: – 0.5 MICRON CMOS Technology – High-speed, low-power CMOS replacement for ABT functions – Typical tSK(o) (Output Skew) < 250ps – Low input and output leakage ≤1µ A (max.) – ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) – Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack – Extended commercial range of -40°C to +85°C – VCC = 5V ±10% • Features for FCT16827AT/BT/CT/ET: – High drive outputs (-32mA IOH, 64mA IOL) – Power off disable outputs permit “live insertion” – Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C • Features for FCT162827AT/BT/CT/ET: – Balanced Output Drivers: ±24mA (commercial), ±16mA (military) – Reduced system switching noise – Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,TA = 25°C DESCRIPTION: The FCT16827AT/BT/CT/ET and FCT162827AT/BT/CT/ ET 20-bit buffers are built using advanced dual metal CMOS technology. These 20-bit bus drivers provide high-performance bus interface buffering for wide data/address paths or busses carrying parity. Two pair of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10-bit buffers or one 20-bit buffer. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16827AT/BT/CT/ET are ideally suited for driving high capacitance loads and low impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. The FCT162827AT/BT/CT/ET have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors. The FCT162827AT/BT/CT/ET are plug-in replacements for the FCT16827AT/BT/CT/ET and ABT16827 for on-board interface applications. FUNCTIONAL BLOCK DIAGRAM 1OE1 1OE2 2OE 1 2OE2 1A1 1Y1 2A1 2Y1 TO 9 OTHER CHANNELS 2773 drw 01 TO 9 OTHER CHANNELS 2773 drw 02 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES ©1996 Integrated Device Technology, Inc. AUGUST 1996 DSC-2773/7 5.17 1 IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET FAST CMOS 20-BIT BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS 1OE1 1Y1 1Y2 1 2 3 4 5 6 7 8 9 10 11 12 13 56 55 54 53 52 51 50 49 48 47 46 45 44 1OE2 1A1 1A2 1OE1 1Y1 1Y2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 CERPACK TOP VIEW E56-1 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OE2 1A1 1A2 GND 1Y3 1Y4 GND 1A3 1A4 GND 1Y3 1Y4 GND 1A3 1A4 VCC 1Y5 1Y6 1Y7 VCC 1A5 1A6 1A7 VCC 1Y5 1Y6 1Y7 VCC 1A5 1A6 1A7 GND 1Y8 1Y9 1Y10 2Y1 2Y2 2Y3 GND 1A8 1A9 1A10 2A1 2A2 2A3 GND 1Y8 1Y9 1Y10 2Y1 2Y2 2Y3 GND 1A8 1A9 1A10 2A1 2A2 2A3 14 SO56-1 43 SO56-2 15 SO56-3 42 16 17 18 19 20 21 22 23 24 25 26 27 28 41 40 39 38 37 36 35 34 33 32 31 30 29 GND 2Y4 2Y5 2Y6 GND 2A4 2A5 2A6 GND 2Y4 2Y5 2Y6 GND 2A4 2A5 2A6 VCC 2Y7 2Y8 VCC 2A7 2A8 VCC 2Y7 2Y8 VCC 2A7 2A8 GND 2Y9 2Y10 2OE1 GND 2A9 2A10 2OE2 GND 2Y9 2Y10 2OE1 GND 2A9 2A10 2OE2 SSOP/ TSSOP/TVSOP TOP VIEW 2773 drw 03 2773 drw 04 5.17 2 IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET FAST CMOS 20-BIT BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN DESCRIPTION Pin Names xOEx xAx xYx Description Output Enable Inputs (Active LOW) Data Inputs 3-State Outputs 2773 tbl 01 FUNCTION TABLE(1) xOE1 L L H X Inputs xOE2 L L X H xAx L H X X Outputs xYx L H Z Z 2773 tbl 02 ABSOLUTE MAXIMUM RATINGS (1) Unit V V °C mA Symbol Description Max. VTERM(2) Terminal Voltage with Respect to –0.5 to +7.0 GND VTERM(3) Terminal Voltage with Respect to –0.5 to GND VCC +0.5 TSTG Storage Temperature –65 to +150 I OUT DC Output Current –60 to +120 NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High Impedance CAPACITANCE (TA = +25°C, f = 1.0MHz) Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. Unit 6.0 pF 8.0 pF 2773 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXXT Output and I/O terminals. 3. Output and I/O terminals for FCT162XXXT. NOTE: 1. This parameter is measured at characterization but not tested. 2773 lnk 04 5.17 3.


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