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IDT54FCT240 Dataheets PDF



Part Number IDT54FCT240
Manufacturers Integrated Device Technology
Logo Integrated Device Technology
Description FAST CMOS OCTAL BUFFER/LINE DRIVER
Datasheet IDT54FCT240 DatasheetIDT54FCT240 Datasheet (PDF)

® FAST CMOS OCTAL BUFFER/LINE DRIVER Integrated Device Technology, Inc. IDT54/74FCT240/A/C IDT54/74FCT241/A/C IDT54/74FCT244/A/C IDT54/74FCT540/A/C IDT54/74FCT541/A/C FEATURES: • IDT54/74FCT240/241/244/540/541 equivalent to FASTTM speed and drive • IDT54/74FCT240A/241A/244A/540A/541A 25% faster than FAST • IDT54/74FCT240C/241C/244C/540C/541C up to 55% faster than FAST • IOL = 64mA (commercial) and 48mA (military) • CMOS power levels (1mW typ. static) • Product available in Radiation Tolerant.

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® FAST CMOS OCTAL BUFFER/LINE DRIVER Integrated Device Technology, Inc. IDT54/74FCT240/A/C IDT54/74FCT241/A/C IDT54/74FCT244/A/C IDT54/74FCT540/A/C IDT54/74FCT541/A/C FEATURES: • IDT54/74FCT240/241/244/540/541 equivalent to FASTTM speed and drive • IDT54/74FCT240A/241A/244A/540A/541A 25% faster than FAST • IDT54/74FCT240C/241C/244C/540C/541C up to 55% faster than FAST • IOL = 64mA (commercial) and 48mA (military) • CMOS power levels (1mW typ. static) • Product available in Radiation Tolerant and Radiation Enhanced versions • Military product compliant to MIL-STD-883, Class B • Meets or exceeds JEDEC Standard 18 specifications DESCRIPTION: The IDT octal buffer/line drivers are built using an advanced dual metal CMOS technology. The IDT54/74FCT240/A/C, IDT54/74FCT241/A/C and IDT54/74FCT244/A/C are designed to be employed as memory and address drivers, clock drivers and bus-oriented transmitter/receivers which provide improved board density. The IDT54/74FCT540/A/C and IDT54/74FCT541/A/C are similar in function to the IDT54/74FCT240/A/C and IDT54/ 74FCT244/A/C, respectively, except that the inputs and outputs are on opposite sides of the package. This pinout arrangement makes these devices especially useful as output ports for microprocessors and as backplane drivers, allowing ease of layout and greater board density. FUNCTIONAL BLOCK DIAGRAMS 2529 cnv* 01–03 OEA OEB DA0 OB0 DA1 OB1 DA2 OB2 DA3 OB3 IDT54/74FCT240 OA0 DB0 OA1 DB1 OA2 DB2 OA3 DB3 DA0 OB0 DA1 OB1 DA2 OB2 DA3 OB3 IDT54/74FCT241/244 *OEB for 241, OEB for 244 OEA 241 Only OEB* OA0 DB0 OA1 DB1 OA2 DB2 OA3 DB3 D0 D1 D2 D3 D4 D5 D6 D7 IDT54/74FCT540/541 *Logic diagram shown for 'FCT540. 'FCT541 is the non-inverting option. 2606 dwg 01–03 OEA OEB O0* O1* O2* O3* O4* O5* O6* O7* The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST is a trademark of National Semiconductor Co. MILITARY AND COMMERCIAL TEMPERATURE RANGES ©1992 Integrated Device Technology, Inc. MAY 1992 DSC-4610/3 7.8 1 IDT54/74FCT240/241/244/540/541/A/C FAST CMOS OCTAL BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS IDT54/74FCT240 OB 0 OEA VCC OEA DA0 OB0 DA1 OB1 DA2 OB2 DA3 OB3 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 P20-1 D20-1 16 SO20-2 15 & E20-1 14 13 12 11 17 VCC OEB OA0 DB0 OA1 DB1 OA2 DB2 OA3 DB3 3 2 DA1 OB1 DA2 OB2 DA3 4 5 6 7 8 DA 0 INDEX 1 20 19 18 17 16 15 OEB 2529 cnv* 04–09 OA0 DB0 OA1 DB1 OA2 L20-2 14 9 10 11 12 13 OB3 GND DB 3 OA3 DB 2 DIP/SOIC/CERPACK TOP VIEW LCC TOP VIEW IDT54/74FCT241/244 OB0 OEA DA0 OB0 DA1 OB1 DA2 OB2 DA3 OB3 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 P20-1 D20-1 16 SO20-2 15 & 14 E20-1 13 12 11 17 VCC OEB* OA0 DB0 OA1 DB1 OA2 DB2 OA3 DB3 3 2 DA1 OB1 DA2 OB2 DA3 4 5 6 7 8 9 10 11 12 13 L20-2 1 20 19 18 17 16 15 14 OA0 DB0 OA1 DB1 OA2 GND DB 3 OB3 DA 0 INDEX OA3 OEA VCC DIP/SOIC/CERPACK TOP VIEW *OEB for 241, OEB for 244 LCC TOP VIEW IDT54/74FCT540/541 OEA VCC 1 OEA D0 D1 D2 D3 D4 D5 D6 D7 GND D1 2 3 4 5 6 7 8 9 10 P20-1 D20-1 SO20-2 & E20-1 19 18 17 16 15 14 13 12 11 OEB O0* O1* O2* O3* O4* O5* O6* O7* D2 D3 D4 D5 D6 4 5 6 7 8 3 2 D0 1 20 VCC 20 19 18 17 16 15 14 OEB INDEX DB 2 OEB * O 0* O 1* O 2* O 3* O 4* L20-2 9 10 11 12 13 GND O 7* O 6* D7 DIP/SOIC/CERPACK TOP VIEW *OX for 540, OX for 541 LCC TOP VIEW O 5* 2606 cnv* 04–09 7.8 2 IDT54/74FCT240/241/244/540/541/A/C FAST CMOS OCTAL BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN DESCRIPTION Pin Names OEA, OEB OEB (1) Dxx Oxx NOTE: 1. OEB for 241 only. FUNCTION TABLE OEA L L H 2606 tbl 04 Description 3–State Output Enable Inputs (Active LOW) 3–State Output Enable Input (Active HIGH) Inputs Outputs Inputs(1) OEB OEB(2) L L H H H L D L H X 240 H L Z Outputs(1) 241 244 540 L H Z L H 541 L H Z L Z H Z 2606 tbl 05 NOTES: 1. H = High Voltage Level X = Don’t Care L = Low Voltage Level Z = High Impedance 2. OEB for 241 only. ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating VTERM(2) Terminal Voltage with Respect to GND VTERM(3) Terminal Voltage with Respect to GND TA Operating Temperature TBIAS Temperature Under Bias TSTG Storage Temperature PT Power Dissipation IOUT DC Output Current Commercial Military –0.5 to +7.0 –0.5 to +7.0 Unit V CAPACITANCE (TA = +25°C, f = 1.0MHz) Symbol CIN COUT Parameter Input Capacitance Output Capacitance (1) Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit pF pF 2606 tbl 02 –0.5 to VCC –0.5 to VCC V 0 to +70 –55 to +125 –55 to +125 0.5 120 –55 to +125 –65 to +135 –65 to +150 0.5 120 °C °C °C W mA NOTE: 1. This parameter is measured at characterization but not tested. NOTES: 2606 tbl 01 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditio.


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