NAND gate. 74ABT00 Datasheet

74ABT00 gate. Datasheet pdf. Equivalent


NXP 74ABT00
74ABT00
Quad 2-input NAND gate
Rev. 3 — 11 August 2016
Product data sheet
1. General description
The 74ABT00 high-performance BiCMOS device combines low static and dynamic power
dissipation with high speed and high output drive.
The 74ABT00 is a quad 2-input NAND gate.
2. Features and benefits
Latch-up protection exceeds 500 mA per JESD78B class II level A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74ABT00D
40 C to +85 C SO14
74ABT00DB 40 C to +85 C SSOP14
74ABT00PW 40 C to +85 C TSSOP14
Description
plastic small outline package; 14 leads; body width
3.9 mm
plastic shrink small outline package; 14 leads; body
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT337-1
SOT402-1


74ABT00 Datasheet
Recommendation 74ABT00 Datasheet
Part 74ABT00
Description Quad 2-input NAND gate
Feature 74ABT00; 74ABT00 Quad 2-input NAND gate Rev. 3 — 11 August 2016 Product data sheet 1. General description .
Manufacture NXP
Datasheet
Download 74ABT00 Datasheet




NXP 74ABT00
NXP Semiconductors
4. Functional diagram
74ABT00
Quad 2-input NAND gate
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PQD
Fig 1. Logic symbol












PQD
Fig 2. IEC logic symbol
5. Pinning information
5.1 Pinning
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PQD
Fig 3. Logic diagram (one gate)
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DDD
Fig 4. Pin configuration for SO14
5.2 Pin description
Table 2.
Symbol
1A to 4A
1B to 4B
1Y to 4Y
GND
VCC
Pin description
Pin
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
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DDD
Fig 5. Pin configuration for SSOP14 and TSSOP14
Description
data input
data input
data output
ground (0 V)
supply voltage
74ABT00
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 11 August 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 12



NXP 74ABT00
NXP Semiconductors
74ABT00
Quad 2-input NAND gate
6. Functional description
Table 3.
Input
nA
L
X
H
Function table[1]
nB
X
L
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
7. Limiting values
Output
nY
H
H
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VCC supply voltage
VI input voltage
VO output voltage
output HIGH or LOW
IIK
input clamping current
VI < 0 V
IOK
output clamping current
VO < 0 V
IO output current
output in LOW-state
Tj junction temperature
Tstg storage temperature
Min
0.5
[1] 1.2
[1] 0.5
18
50
-
[2] -
65
Max
+7.0
+7.0
+5.5
-
-
40
150
+150
Unit
V
V
V
mA
mA
mA
C
C
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C.
8. Recommended operating conditions
Table 5. Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VCC
VI
VIH
VIL
IOH
IOL
t/V
supply voltage
input voltage
HIGH-level input voltage
LOW-level input voltage
HIGH-level output current
LOW-level output current
input transition rise and fall rate
Tamb
ambient temperature
Conditions
in free air
Min Typ Max Unit
4.5 - 5.5 V
0 - VCC V
2.0 -
-V
- - 0.8 V
15 -
- mA
- - 20 mA
0 - 5 ns/V
40 - +85 C
74ABT00
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 11 August 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
3 of 12







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