74ABT377A

INTEGRATED CIRCUITS 74ABT377A Octal D-type flip-flop with enable Product specification Replaces data sheet 74ABT377 of 1995 Sep 06 IC23 Data Handbook 1997 Feb 26 Philips Semiconductors Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377A FEATURES Ideal for addressable register applications 8-bit positive edge-triggered register Enable for address and data synchronization applications Output capability: +64mA/-32mA Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17 ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model DESCRIPTION The 74ABT377A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low. The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation. Power-up reset QUICK REFERENCE DATA SYMBOL tPLH tPHL CIN ICCH PARAMETER Propagation delay CP to Qn Input capacitance Total current supply CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 5V VI = 0V or VCC Outputs High; VCC = 5.5V TYPICAL 3....