74ABT74

Philips Semiconductors Dual D-type flip-flop Product specification 74ABT74 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V tPLH tPHL tOSLH tOSHL CIN Propagation delay CPn to Qn, Qn Output to Output skew Input capacitance CL = 50pF; VCC = 5V VI = 0V or VCC ICC Total supply current Outputs disabled; VCC = 5.5V TYPICAL UNIT 3.0 2.5 ns 0.5 ns 3 pF 50 µA PIN CONFIGURATION DESCRIPTION The 74ABT74 is a dual positive edge-triggered D-type flip-flop featuring individual data, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock input. When set and reset are inactive (high), data at the D input is transferred to the Q and Q outputs on the low-to-high transition of the clock. Data must be stable just one setup time prior to the low-to-high transition of the clock for predictable operation. Clock triggering occurs at a voltage level and is not dir...