74AC174

74AC174 HEX D-TYPE FLIP FLOP WITH CLEAR PRELIMINARY DATA s s s s s TTL. Information signals applied to D inputs are s transfered to the Q output on the positive going edge of the clock pulse. s When the CLEAR input is held low, the Q outputs are held low independentelyof the other inputs . s All inputs and outputs are equipped with protection circuits against static discharge, giving DESCRIPTION www.DataSheet4U.com them 2KV ESD immunity and transient excess The AC174 is an high-speed CMOS HEX voltage. D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power applications mantaining high speed operation similar to eqivalent Bipolar Schottky s HIGH SPEED: fMAX =125 MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 8 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174 IMPROVED LATCH-UP IMMUNITY B M (Plastic Package) (Micro Package) ORDER CODES : 74AC174B 74AC174M PIN CONNECTION AND IEC LOGIC SYMBOLS May 1997 1/10 74AC174 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 5, 7, 10, 12, 15 3, 4, 6, 11, 13, 14 9 8 16 SYMBOL CLEAR Q0 to Q5 D0 to D5 CLOCK GND VCC NAME AND F UNCTIO N Asyncronous Master Reset (Active LOW) Flip-Fl...