74AC280

74AC280 9-Bit Parity Generator/Checker November 1988 Revised November 1999 74AC280 9-Bit Parity Generator/Checker General Description The AC280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output. Features s ICC reduced by 50% s 9-bit width for memory applications s AC280: 5962-92201 Ordering Code: Order Number 74AC280SC 74AC280SJ Package Number M14A M14D Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram www.DataSheet4U.com IEEE/IEC Truth Table Pin Descriptions Pin Names I0–I8 ∑Ο ∑Ε Description Data Inputs Odd Parity Output Even Parity Output Number of HIGH Inputs I0–I8 0, 2, 4, 6, 8 1, 3, 5, 7, 9 H = HIGH Voltage Level L = LOW Voltage Level Outputs ∑ Even H L ∑ Odd L H FACT is a trademark of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation DS009955 www.fairchildsemi.com 74AC280 Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimat...