74221 reset Datasheet

74221 Datasheet, PDF, Equivalent


Part Number

74221

Description

Dual non-retriggerable monostable multivibrator with reset

Manufacture

NXP

Total Page 15 Pages
Datasheet
Download 74221 Datasheet


74221
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT221
Dual non-retriggerable monostable
multivibrator with reset
Product specification
Supersedes data of April 1988
File under Integrated Circuits, IC06
December 1990

74221
Philips Semiconductors
Dual non-retriggerable monostable
multivibrator with reset
Product specification
74HC/HCT221
FEATURES
Pulse width variance is typically less than ± 5%
Pin-out identical to “123”
Overriding reset terminates output pulse
nB inputs have hysteresis for improved noise immunity
Output capability: standard (except for nREXT/CEXT)
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT221 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT221 are dual non-retriggerable monostable
multivibrators. Each multivibrator features an active
LOW-going edge input (nA) and an active HIGH-going
edge input (nB), either of which can be used as an enable
input.
Pulse triggering occurs at a particular voltage level and is
not directly related to the transition time of the input pulse.
Schmitt-trigger input circuitry for the nB inputs allow
jitter-free triggering from inputs with slow transition rates,
providing the circuit with excellent noise immunity.
Once triggered, the outputs (nQ, nQ) are independent of
further transitions of nA and nB inputs and are a function
of the timing components. The output pulses can be
terminated by the overriding active LOW reset inputs
(nRD). Input pulses may be of any duration relative to the
output pulse.
Pulse width stability is achieved through internal
compensation and is virtually independent of VCC and
temperature. In most applications pulse stability will only
be limited by the accuracy of the external timing
components.
The output pulse width is defined by the following
relationship:
tW = CEXTREXTIn2
tW = 0.7CEXTREXT
Pin assignments for the “221” are identical to those of the
“123” so that the “221” can be substituted for those
products in systems not using the retrigger by merely
changing the value of REXT and/or CEXT.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL PARAMETER
CONDITIONS
propagation delay
tPHL nA, nB, nRD to nQ, nQ
CL = 15 pF; VCC = 5 V;
REXT = 5 k; CEXT = 0 pF
tPLH nA, nB, nRD to nQ, nQ
CI input capacitance
CPD power dissipation capacitance per package notes 1 and 2
TYPICAL
HC HCT
29 32
35 36
3.5 3.5
90 96
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) + 0.33 × CEXT × VCC2 × fo + D × 28 × VCC where:
fi = input frequency in MHz; fo = output frequency in MHz
(CL × VCC2 × fo) = sum of outputs
CEXT = timing capacitance in pF; CL = output load capacitance in pF
VCC = supply voltage in V; D = duty factor in %
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
UNIT
ns
ns
pF
pF
December 1990
2


Features INTEGRATED CIRCUITS DATA SHEET For a co mplete data sheet, please also download : • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74H C/HCT/HCU/HCMOS Logic Package Informati on • The IC06 74HC/HCT/HCU/HCMOS Logi c Package Outlines 74HC/HCT221 Dual no n-retriggerable monostable multivibrato r with reset Product specification Sup ersedes data of April 1988 File under I ntegrated Circuits, IC06 December 1990 Philips Semiconductors Product speci cation Dual non-retriggerable monost able multivibrator with reset FEATURES • Pulse width variance is typically l ess than ± 5% • Pin-out identical to “123” • Overriding reset termina tes output pulse • nB inputs have hys teresis for improved noise immunity • Output capability: standard (except fo r nREXT/CEXT) • ICC category: MSI GEN ERAL DESCRIPTION The 74HC/HCT221 are hi gh-speed Si-gate CMOS devices and are p in compatible with low power Schottky T TL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT221 a.
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