74240 Receiver Datasheet

74240 Datasheet, PDF, Equivalent


Part Number

74240

Description

Octal 3-STATE Buffer/Line Driver/Line Receiver

Manufacture

Fairchild Semiconductor

Total Page 7 Pages
Datasheet
Download 74240 Datasheet


74240
August 1986
Revised March 2000
DM74LS240 • DM74LS241
Octal 3-STATE Buffer/Line Driver/Line Receiver
General Description
These buffers/line drivers are designed to improve both the
performance and PC board density of 3-STATE buffers/
drivers employed as memory-address drivers, clock driv-
ers, and bus-oriented transmitters/receivers. Featuring
400 mV of hysteresis at each low current PNP data line
input, they provide improved noise rejection and high
fanout outputs and can be used to drive terminated lines
down to 133.
Features
s 3-STATE outputs drive bus lines directly
s PNP inputs reduce DC loading on bus lines
s Hysteresis at data inputs improves noise margins
s Typical IOL (sink current)
24 mA
s Typical IOH (source current)
15 mA
s Typical propagation delay times
Inverting
10.5 ns
Noninverting 12 ns
s Typical enable/disable time 18 ns
s Typical power dissipation (enabled)
Inverting
130 mW
Noninverting 135 mW
Ordering Code:
Order Number Package Number
Package Description
DM74LS240WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS240SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS240N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74LS241WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS241N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
DM74LS240
© 2000 Fairchild Semiconductor Corporation DS006411
DM74LS241
www.fairchildsemi.com

74240
Function Tables
DM74LS240
Inputs
GA
LL
LH
HX
Output
Y
H
L
Z
L = LOW Logic Level
H = HIGH Logic Level
X = Either LOW or HIGH Logic Level
Z = High Impedance
DM74LS241
Inputs
Outputs
G G 1A 2A 1Y 2Y
XLLXL
X L HXH
XHXXZ
HXX L
L
HXXH
H
LXXX
Z
www.fairchildsemi.com
2


Features DM74LS240 • DM74LS241 Octal 3-STATE Bu ffer/Line Driver/Line Receiver August 1986 Revised March 2000 DM74LS240 • DM74LS241 Octal 3-STATE Buffer/Line Dri ver/Line Receiver General Description T hese buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drive rs employed as memory-address drivers, clock drivers, and bus-oriented transmi tters/receivers. Featuring 400 mV of hy steresis at each low current PNP data l ine input, they provide improved noise rejection and high fanout outputs and c an be used to drive terminated lines do wn to 133Ω. Features s 3-STATE outpu ts drive bus lines directly s PNP input s reduce DC loading on bus lines s Hyst eresis at data inputs improves noise ma rgins s Typical IOL (sink current) 24 m A s Typical IOH (source current) −15 mA s Typical propagation delay times In verting Noninverting 10.5 ns 12 ns s T ypical enable/disable time 18 ns s Typi cal power dissipation (enabled) Inverting Noninverting 130 mW 135 mW O.
Keywords 74240, datasheet, pdf, Fairchild Semiconductor, Octal, 3-STATE, Buffer/Line, Driver/Line, Receiver, 4240, 240, 40, 7424, 742, 74, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute




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